US4523275A
(en)
*
|
1980-11-14 |
1985-06-11 |
Sperry Corporation |
Cache/disk subsystem with floating entry
|
US4577282A
(en)
*
|
1982-02-22 |
1986-03-18 |
Texas Instruments Incorporated |
Microcomputer system for digital signal processing
|
US5854907A
(en)
*
|
1982-02-22 |
1998-12-29 |
Texas Instruments Incorporated |
Microcomputer for digital signal processing having on-chip memory and external memory access
|
JPS6047624B2
(ja)
*
|
1982-06-30 |
1985-10-22 |
富士通株式会社 |
アドレス変換制御方式
|
JPS5948879A
(ja)
*
|
1982-09-10 |
1984-03-21 |
Hitachi Ltd |
記憶制御方式
|
GB2127998B
(en)
*
|
1982-09-27 |
1986-06-18 |
Data General Corp |
Encachement apparatus
|
JPS60500187A
(ja)
*
|
1982-12-30 |
1985-02-07 |
インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン |
データ処理システム
|
US4577274A
(en)
*
|
1983-07-11 |
1986-03-18 |
At&T Bell Laboratories |
Demand paging scheme for a multi-ATB shared memory processing system
|
US4731739A
(en)
*
|
1983-08-29 |
1988-03-15 |
Amdahl Corporation |
Eviction control apparatus
|
US4612612A
(en)
*
|
1983-08-30 |
1986-09-16 |
Amdahl Corporation |
Virtually addressed cache
|
US4682281A
(en)
*
|
1983-08-30 |
1987-07-21 |
Amdahl Corporation |
Data storage unit employing translation lookaside buffer pointer
|
US4706190A
(en)
*
|
1983-09-22 |
1987-11-10 |
Digital Equipment Corporation |
Retry mechanism for releasing control of a communications path in digital computer system
|
US4648030A
(en)
*
|
1983-09-22 |
1987-03-03 |
Digital Equipment Corporation |
Cache invalidation mechanism for multiprocessor systems
|
JPS6091462A
(ja)
*
|
1983-10-26 |
1985-05-22 |
Toshiba Corp |
演算制御装置
|
JPS60142451A
(ja)
*
|
1983-12-29 |
1985-07-27 |
Fujitsu Ltd |
アドレス変換制御方式
|
US4669043A
(en)
*
|
1984-02-17 |
1987-05-26 |
Signetics Corporation |
Memory access controller
|
JPS60229111A
(ja)
*
|
1984-04-26 |
1985-11-14 |
Fanuc Ltd |
数値制御方式
|
JPS61166653A
(ja)
*
|
1985-01-19 |
1986-07-28 |
Panafacom Ltd |
アドレス変換エラー処理方法
|
US4860192A
(en)
*
|
1985-02-22 |
1989-08-22 |
Intergraph Corporation |
Quadword boundary cache system
|
US4884197A
(en)
*
|
1985-02-22 |
1989-11-28 |
Intergraph Corporation |
Method and apparatus for addressing a cache memory
|
US4933835A
(en)
*
|
1985-02-22 |
1990-06-12 |
Intergraph Corporation |
Apparatus for maintaining consistency of a cache memory with a primary memory
|
US4899275A
(en)
*
|
1985-02-22 |
1990-02-06 |
Intergraph Corporation |
Cache-MMU system
|
US5255384A
(en)
*
|
1985-02-22 |
1993-10-19 |
Intergraph Corporation |
Memory address translation system having modifiable and non-modifiable translation mechanisms
|
JP2539357B2
(ja)
|
1985-03-15 |
1996-10-02 |
株式会社日立製作所 |
デ−タ処理装置
|
US5206945A
(en)
*
|
1985-03-15 |
1993-04-27 |
Hitachi, Ltd. |
Single-chip pipeline processor for fetching/flushing instruction/data caches in response to first/second hit/mishit signal respectively detected in corresponding to their logical addresses
|
US4713755A
(en)
*
|
1985-06-28 |
1987-12-15 |
Hewlett-Packard Company |
Cache memory consistency control with explicit software instructions
|
US4774653A
(en)
*
|
1985-08-07 |
1988-09-27 |
Hewlett-Packard Company |
Hybrid hardware/software method and apparatus for virtual memory address translation using primary and secondary translation buffers
|
US5347636A
(en)
*
|
1985-11-08 |
1994-09-13 |
Nec Corporation |
Data processor which efficiently accesses main memory and input/output devices
|
JPS62202247A
(ja)
*
|
1985-11-25 |
1987-09-05 |
Nec Corp |
キヤツシユメモリ内容一致処理方式
|
US4785398A
(en)
*
|
1985-12-19 |
1988-11-15 |
Honeywell Bull Inc. |
Virtual cache system using page level number generating CAM to access other memories for processing requests relating to a page
|
US4761737A
(en)
*
|
1986-01-16 |
1988-08-02 |
International Business Machines Corporation |
Method to automatically increase the segment size of unix files in a page segmented virtual memory data processing system
|
US5349672A
(en)
*
|
1986-03-17 |
1994-09-20 |
Hitachi, Ltd. |
Data processor having logical address memories and purge capabilities
|
JPH0814803B2
(ja)
*
|
1986-05-23 |
1996-02-14 |
株式会社日立製作所 |
アドレス変換方式
|
US5091846A
(en)
*
|
1986-10-03 |
1992-02-25 |
Intergraph Corporation |
Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
|
US5045996A
(en)
*
|
1986-11-12 |
1991-09-03 |
Xerox Corporation |
Multiprocessor cache memory housekeeping
|
US5230045A
(en)
*
|
1986-11-12 |
1993-07-20 |
Xerox Corporation |
Multiple address space system including address translator for receiving virtual addresses from bus and providing real addresses on the bus
|
US5123101A
(en)
*
|
1986-11-12 |
1992-06-16 |
Xerox Corporation |
Multiple address space mapping technique for shared memory wherein a processor operates a fault handling routine upon a translator miss
|
US4843542A
(en)
*
|
1986-11-12 |
1989-06-27 |
Xerox Corporation |
Virtual memory cache for use in multi-processing systems
|
DE3740834A1
(de)
*
|
1987-01-22 |
1988-08-04 |
Nat Semiconductor Corp |
Aufrechterhaltung der kohaerenz zwischen einem mikroprozessorenintegrierten cache-speicher und einem externen speicher
|
GB2200483B
(en)
*
|
1987-01-22 |
1991-10-16 |
Nat Semiconductor Corp |
Memory referencing in a high performance microprocessor
|
US5293597A
(en)
*
|
1987-03-09 |
1994-03-08 |
At&T Bell Laboratories |
Concurrent context memory management unit
|
US5179689A
(en)
*
|
1987-03-13 |
1993-01-12 |
Texas Instruments Incorporated |
Dataprocessing device with instruction cache
|
US4912636A
(en)
*
|
1987-03-13 |
1990-03-27 |
Magar Surendar S |
Data processing device with multiple on chip memory buses
|
JPS63240650A
(ja)
*
|
1987-03-28 |
1988-10-06 |
Toshiba Corp |
キヤツシユメモリ装置
|
US4827406A
(en)
*
|
1987-04-01 |
1989-05-02 |
International Business Machines Corporation |
Memory allocation for multiple processors
|
US4937733A
(en)
*
|
1987-05-01 |
1990-06-26 |
Digital Equipment Corporation |
Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system
|
US4858116A
(en)
*
|
1987-05-01 |
1989-08-15 |
Digital Equipment Corporation |
Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
|
US4949239A
(en)
*
|
1987-05-01 |
1990-08-14 |
Digital Equipment Corporation |
System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
|
US4941083A
(en)
*
|
1987-05-01 |
1990-07-10 |
Digital Equipment Corporation |
Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
|
US5341510A
(en)
*
|
1987-05-01 |
1994-08-23 |
Digital Equipment Corporation |
Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
|
US5168560A
(en)
*
|
1987-05-29 |
1992-12-01 |
Amdahl Corporation |
Microprocessor system private split cache tag stores with the system tag store having a different validity bit for the same data line
|
US5317717A
(en)
*
|
1987-07-01 |
1994-05-31 |
Digital Equipment Corp. |
Apparatus and method for main memory unit protection using access and fault logic signals
|
US4926317A
(en)
*
|
1987-07-24 |
1990-05-15 |
Convex Computer Corporation |
Hierarchical memory system with logical cache, physical cache, and address translation unit for generating a sequence of physical addresses
|
US4897786A
(en)
*
|
1987-09-04 |
1990-01-30 |
Digital Equipment Corporation |
Bus window interlock
|
US5119290A
(en)
*
|
1987-10-02 |
1992-06-02 |
Sun Microsystems, Inc. |
Alias address support
|
US4937736A
(en)
*
|
1987-11-30 |
1990-06-26 |
International Business Machines Corporation |
Memory controller for protected memory with automatic access granting capability
|
GB8728494D0
(en)
*
|
1987-12-05 |
1988-01-13 |
Int Computers Ltd |
Multi-cache data storage system
|
GB2216308A
(en)
*
|
1988-03-01 |
1989-10-04 |
Ardent Computer Corp |
Maintaining cache consistency
|
US5214770A
(en)
*
|
1988-04-01 |
1993-05-25 |
Digital Equipment Corporation |
System for flushing instruction-cache only when instruction-cache address and data-cache address are matched and the execution of a return-from-exception-or-interrupt command
|
NL8800858A
(nl)
*
|
1988-04-05 |
1989-11-01 |
Philips Nv |
Rekenmachinesysteem voorzien van een hoofdbus en een tussen processor en geheugen direkt verbonden extra kommunikatielijn.
|
US5239635A
(en)
*
|
1988-06-06 |
1993-08-24 |
Digital Equipment Corporation |
Virtual address to physical address translation using page tables in virtual memory
|
US4965720A
(en)
*
|
1988-07-18 |
1990-10-23 |
International Business Machines Corporation |
Directed address generation for virtual-address data processors
|
US5018063A
(en)
*
|
1988-12-05 |
1991-05-21 |
International Business Machines Corporation |
Method for reducing cross-interrogate delays in a multiprocessor system
|
US5123097A
(en)
*
|
1989-01-05 |
1992-06-16 |
Bull Hn Information Systems Inc. |
Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy
|
EP0377971B1
(de)
*
|
1989-01-13 |
1995-03-22 |
International Business Machines Corporation |
Ein-/Ausgabebuscachespeicherung
|
JPH087719B2
(ja)
*
|
1989-02-10 |
1996-01-29 |
日本電気株式会社 |
情報処理システム
|
US5404476A
(en)
*
|
1989-02-10 |
1995-04-04 |
Nec Corporation |
Multiprocessing system having a single translation lookaside buffer with reduced processor overhead
|
US5099415A
(en)
*
|
1989-02-15 |
1992-03-24 |
International Business Machines |
Guess mechanism for virtual address translation
|
JPH0650480B2
(ja)
*
|
1989-05-02 |
1994-06-29 |
株式会社日立製作所 |
多重仮想記憶システムおよびアドレス制御装置
|
WO1990014629A2
(en)
*
|
1989-05-26 |
1990-11-29 |
Massachusetts Institute Of Technology |
Parallel multithreaded data processing system
|
US5353418A
(en)
*
|
1989-05-26 |
1994-10-04 |
Massachusetts Institute Of Technology |
System storing thread descriptor identifying one of plural threads of computation in storage only when all data for operating on thread is ready and independently of resultant imperative processing of thread
|
JPH0748190B2
(ja)
*
|
1990-01-22 |
1995-05-24 |
株式会社東芝 |
キャッシュメモリ内蔵マイクロプロセッサ
|
US5088026A
(en)
*
|
1990-02-09 |
1992-02-11 |
International Business Machines Corporation |
Method for managing a data cache using virtual external storage addresses as arguments
|
US5159678A
(en)
*
|
1990-06-11 |
1992-10-27 |
Supercomputer Systems Limited Partnership |
Method for efficient non-virtual main memory management
|
US5493662A
(en)
*
|
1990-08-20 |
1996-02-20 |
Nec Corporation |
Apparatus for enabling exchange of data of different lengths between memories of at least two computer systems
|
GB2256512B
(en)
*
|
1991-06-04 |
1995-03-15 |
Intel Corp |
Second level cache controller unit and system
|
US5430850A
(en)
*
|
1991-07-22 |
1995-07-04 |
Massachusetts Institute Of Technology |
Data processing system with synchronization coprocessor for multiple threads
|
CA2285096C
(en)
*
|
1991-11-12 |
2000-05-09 |
Ibm Canada Limited-Ibm Canada Limitee |
Logical mapping of data objects using data spaces
|
JP2788836B2
(ja)
*
|
1992-05-15 |
1998-08-20 |
インターナショナル・ビジネス・マシーンズ・コーポレイション |
ディジタルコンピュータシステム
|
US5603008A
(en)
*
|
1992-09-30 |
1997-02-11 |
Amdahl Corporation |
Computer system having cache memories with independently validated keys in the TLB
|
US5566324A
(en)
*
|
1992-12-24 |
1996-10-15 |
Ncr Corporation |
Computer apparatus including a main memory prefetch cache and method of operation thereof
|
JPH06290076A
(ja)
*
|
1993-04-05 |
1994-10-18 |
Nec Ic Microcomput Syst Ltd |
デバッグ装置
|
US5715420A
(en)
*
|
1995-02-10 |
1998-02-03 |
International Business Machines Corporation |
Method and system for efficient memory management in a data processing system utilizing a dual mode translation lookaside buffer
|
US5787476A
(en)
*
|
1995-05-05 |
1998-07-28 |
Silicon Graphics, Inc. |
System and method for maintaining coherency of virtual-to-physical memory translations in a multiprocessor computer
|
US6199152B1
(en)
|
1996-08-22 |
2001-03-06 |
Transmeta Corporation |
Translated memory protection apparatus for an advanced microprocessor
|
US5913923A
(en)
*
|
1996-12-06 |
1999-06-22 |
National Semiconductor Corporation |
Multiple bus master computer system employing a shared address translation unit
|
US5920881A
(en)
*
|
1997-05-20 |
1999-07-06 |
Micron Electronics, Inc. |
Method and system for using a virtual register file in system memory
|
US6192457B1
(en)
|
1997-07-02 |
2001-02-20 |
Micron Technology, Inc. |
Method for implementing a graphic address remapping table as a virtual register file in system memory
|
US6195734B1
(en)
|
1997-07-02 |
2001-02-27 |
Micron Technology, Inc. |
System for implementing a graphic address remapping table as a virtual register file in system memory
|
CA2283560C
(en)
*
|
1997-08-11 |
2003-12-09 |
Transmeta Corporation |
Translated memory protection apparatus for an advanced microprocessor
|
US6108733A
(en)
*
|
1998-01-20 |
2000-08-22 |
Micron Technology, Inc. |
Method for extending the available number of configuration registers
|
US6272576B1
(en)
|
1998-01-20 |
2001-08-07 |
Micron Technology, Inc. |
Method for extending the available number of configuration registers
|
US6243775B1
(en)
|
1998-01-20 |
2001-06-05 |
Micron Technology, Inc. |
System for extending the available number of configuration registers
|
US6260006B1
(en)
*
|
1998-12-22 |
2001-07-10 |
Storage Technology Corporation |
System and method for multi-volume tape library
|
US6785759B1
(en)
*
|
2000-05-10 |
2004-08-31 |
International Business Machines Corporation |
System and method for sharing I/O address translation caching across multiple host bridges
|
US6968469B1
(en)
|
2000-06-16 |
2005-11-22 |
Transmeta Corporation |
System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored
|
EP1262875A1
(de)
*
|
2001-05-28 |
2002-12-04 |
Texas Instruments Incorporated |
Master-Slave-Prozessorsystem mit gemeinsamem Adressenübersetzungspufferspeicher
|
US6742103B2
(en)
|
2000-08-21 |
2004-05-25 |
Texas Instruments Incorporated |
Processing system with shared translation lookaside buffer
|
US6742104B2
(en)
|
2000-08-21 |
2004-05-25 |
Texas Instruments Incorporated |
Master/slave processing system with shared translation lookaside buffer
|
ATE545909T1
(de)
*
|
2001-05-28 |
2012-03-15 |
Texas Instruments Inc |
Multiprozessorsystem mit gemeinsamem adressenübersetzungspufferspeicher
|
JP4085328B2
(ja)
*
|
2003-04-11 |
2008-05-14 |
ソニー株式会社 |
情報処理装置および方法、記録媒体、プログラム、並びに撮像装置
|
US20050034125A1
(en)
*
|
2003-08-05 |
2005-02-10 |
Logicube, Inc. |
Multiple virtual devices
|
US20070233727A1
(en)
*
|
2003-08-05 |
2007-10-04 |
Gideon Guy |
Multiple Virtual Devices
|
JP4837247B2
(ja)
*
|
2003-09-24 |
2011-12-14 |
パナソニック株式会社 |
プロセッサ
|
US7434141B1
(en)
*
|
2004-06-28 |
2008-10-07 |
Hewlett-Packard Development Company, L.P. |
Network-based memory error decoding system and method
|
GB0505289D0
(en)
*
|
2005-03-15 |
2005-04-20 |
Symbian Software Ltd |
Computing device with automated page based rem shadowing and method of operation
|
US20060259665A1
(en)
*
|
2005-05-13 |
2006-11-16 |
Sanjive Agarwala |
Configurable multiple write-enhanced direct memory access unit
|
JP4779788B2
(ja)
*
|
2005-08-29 |
2011-09-28 |
カシオ計算機株式会社 |
番組録画装置および移動型の受信装置およびデータ管理方法
|
US20100088770A1
(en)
*
|
2008-10-08 |
2010-04-08 |
Raz Yerushalmi |
Device and method for disjointed computing
|
US20140101405A1
(en)
*
|
2012-10-05 |
2014-04-10 |
Advanced Micro Devices, Inc. |
Reducing cold tlb misses in a heterogeneous computing system
|
US9501222B2
(en)
|
2014-05-09 |
2016-11-22 |
Micron Technology, Inc. |
Protection zones in virtualized physical addresses for reconfigurable memory systems using a memory abstraction
|
US9892058B2
(en)
*
|
2015-12-16 |
2018-02-13 |
Advanced Micro Devices, Inc. |
Centrally managed unified shared virtual address space
|
US10970118B2
(en)
|
2017-08-02 |
2021-04-06 |
Advanced Micro Devices, Inc. |
Shareable FPGA compute engine
|
US11422812B2
(en)
|
2019-06-25 |
2022-08-23 |
Advanced Micro Devices, Inc. |
Method and apparatus for efficient programmable instructions in computer systems
|