DE3176834D1 - Address control means in a data processing system - Google Patents

Address control means in a data processing system

Info

Publication number
DE3176834D1
DE3176834D1 DE8181101074T DE3176834T DE3176834D1 DE 3176834 D1 DE3176834 D1 DE 3176834D1 DE 8181101074 T DE8181101074 T DE 8181101074T DE 3176834 T DE3176834 T DE 3176834T DE 3176834 D1 DE3176834 D1 DE 3176834D1
Authority
DE
Germany
Prior art keywords
control means
data processing
processing system
address control
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181101074T
Other languages
English (en)
Inventor
Justin Ralph Butwell
Casper Anthony Scalzi
Richard John Schmalz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3176834D1 publication Critical patent/DE3176834D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
DE8181101074T 1980-03-19 1981-02-16 Address control means in a data processing system Expired DE3176834D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/131,570 US4355355A (en) 1980-03-19 1980-03-19 Address generating mechanism for multiple virtual spaces

Publications (1)

Publication Number Publication Date
DE3176834D1 true DE3176834D1 (en) 1988-09-08

Family

ID=22450031

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181101074T Expired DE3176834D1 (en) 1980-03-19 1981-02-16 Address control means in a data processing system

Country Status (6)

Country Link
US (1) US4355355A (de)
EP (1) EP0036085B1 (de)
JP (1) JPS6022377B2 (de)
CA (1) CA1153824A (de)
DE (1) DE3176834D1 (de)
ES (1) ES500467A0 (de)

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US5175828A (en) * 1989-02-13 1992-12-29 Hewlett-Packard Company Method and apparatus for dynamically linking subprogram to main program using tabled procedure name comparison
JPH0650480B2 (ja) * 1989-05-02 1994-06-29 株式会社日立製作所 多重仮想記憶システムおよびアドレス制御装置
DE4019961C2 (de) * 1989-06-23 1994-11-24 Hitachi Ltd Steuerung für den Zugriff auf einen Adreßumsetzungsspeicher in einem Prozessorsystem
JP2768503B2 (ja) * 1989-07-25 1998-06-25 富士通株式会社 仮想記憶アドレス空間アクセス制御方式
JP2825550B2 (ja) * 1989-09-21 1998-11-18 株式会社日立製作所 多重仮想空間アドレス制御方法および計算機システム
JPH0679296B2 (ja) * 1989-09-22 1994-10-05 株式会社日立製作所 多重仮想アドレス空間アクセス方法およびデータ処理装置
US5237668A (en) * 1989-10-20 1993-08-17 International Business Machines Corporation Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media
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US5423013A (en) * 1991-09-04 1995-06-06 International Business Machines Corporation System for addressing a very large memory with real or virtual addresses using address mode registers
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US5371890A (en) * 1991-10-30 1994-12-06 International Business Machines Corporation Problem state cross-memory communication using communication memory domains
EP0543032A1 (de) * 1991-11-16 1993-05-26 International Business Machines Corporation Erweitertes Speicheradressierungsschema
US5381537A (en) * 1991-12-06 1995-01-10 International Business Machines Corporation Large logical addressing method and means
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US5361356A (en) * 1992-03-06 1994-11-01 International Business Machines Corporation Storage isolation with subspace-group facility
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US5734817A (en) * 1995-03-01 1998-03-31 Unisys Corporation Method for making a data base available to a user program during data base recovery
US5802359A (en) * 1995-03-31 1998-09-01 International Business Machines Corporation Mapping processor state into a millicode addressable processor state register array
US5761740A (en) * 1995-11-30 1998-06-02 Unisys Corporation Method of and apparatus for rapidly loading addressing registers
US5732404A (en) * 1996-03-29 1998-03-24 Unisys Corporation Flexible expansion of virtual memory addressing
US6356991B1 (en) * 1997-12-31 2002-03-12 Unisys Corporation Programmable address translation system
JP3476376B2 (ja) * 1998-12-16 2003-12-10 富士通株式会社 仮想記憶アドレス空間アクセス制御方法とそのための装置
US6289435B1 (en) * 1999-05-17 2001-09-11 Creative Technology Ltd. Re-use of special purposed registers as general purpose registers
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Also Published As

Publication number Publication date
ES8202968A1 (es) 1982-03-01
EP0036085A3 (en) 1983-09-14
EP0036085B1 (de) 1988-08-03
ES500467A0 (es) 1982-03-01
JPS6022377B2 (ja) 1985-06-01
EP0036085A2 (de) 1981-09-23
JPS56140576A (en) 1981-11-02
CA1153824A (en) 1983-09-13
US4355355A (en) 1982-10-19

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Legal Events

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