DE3277264D1 - Method of laser annealing a subsurface region in a semiconductor - Google Patents

Method of laser annealing a subsurface region in a semiconductor

Info

Publication number
DE3277264D1
DE3277264D1 DE8282105775T DE3277264T DE3277264D1 DE 3277264 D1 DE3277264 D1 DE 3277264D1 DE 8282105775 T DE8282105775 T DE 8282105775T DE 3277264 T DE3277264 T DE 3277264T DE 3277264 D1 DE3277264 D1 DE 3277264D1
Authority
DE
Germany
Prior art keywords
semiconductor
laser annealing
subsurface region
subsurface
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282105775T
Other languages
English (en)
Inventor
Howard Helge Hansen
Jerome Brett Lasky
Ronald R Silverman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3277264D1 publication Critical patent/DE3277264D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/092—Laser beam processing-diodes or transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/093—Laser beam treatment in general
DE8282105775T 1981-07-08 1982-06-29 Method of laser annealing a subsurface region in a semiconductor Expired DE3277264D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/281,267 US4379727A (en) 1981-07-08 1981-07-08 Method of laser annealing of subsurface ion implanted regions

Publications (1)

Publication Number Publication Date
DE3277264D1 true DE3277264D1 (en) 1987-10-15

Family

ID=23076599

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282105775T Expired DE3277264D1 (en) 1981-07-08 1982-06-29 Method of laser annealing a subsurface region in a semiconductor

Country Status (5)

Country Link
US (1) US4379727A (de)
EP (1) EP0069327B1 (de)
JP (1) JPS5810822A (de)
CA (1) CA1189768A (de)
DE (1) DE3277264D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
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JPS5823479A (ja) * 1981-08-05 1983-02-12 Fujitsu Ltd 半導体装置の製造方法
JPS5856409A (ja) * 1981-09-30 1983-04-04 Toshiba Corp 半導体装置の製造方法
US4698486A (en) * 1984-02-28 1987-10-06 Tamarack Scientific Co., Inc. Method of heating semiconductor wafers in order to achieve annealing, silicide formation, reflow of glass passivation layers, etc.
US4571348A (en) * 1984-08-08 1986-02-18 General Motors Corporation Reducing hydrogen content of vacuum deposited films
US4621411A (en) * 1984-09-28 1986-11-11 Texas Instruments Incorporated Laser-enhanced drive in of source and drain diffusions
US4666557A (en) * 1984-12-10 1987-05-19 Ncr Corporation Method for forming channel stops in vertical semiconductor surfaces
US5578520A (en) 1991-05-28 1996-11-26 Semiconductor Energy Laboratory Co., Ltd. Method for annealing a semiconductor
US5766344A (en) * 1991-09-21 1998-06-16 Semiconductor Energy Laboratory Co., Ltd. Method for forming a semiconductor
JPH06124913A (ja) * 1992-06-26 1994-05-06 Semiconductor Energy Lab Co Ltd レーザー処理方法
JP3211394B2 (ja) * 1992-08-13 2001-09-25 ソニー株式会社 半導体装置の製造方法
JPH06232069A (ja) * 1993-02-04 1994-08-19 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
GB9406900D0 (en) * 1994-04-07 1994-06-01 Philips Electronics Uk Ltd Manufacture of electronic devices comprising thin -film transistors
DE19511251A1 (de) * 1995-03-27 1996-10-02 Siemens Ag Bipolarer Siliziumtransistor
WO1999028960A1 (fr) * 1997-11-28 1999-06-10 Matsushita Electric Industrial Co., Ltd. Procede et dispositif d'activation d'impuretes dans des semi-conducteurs
US6417515B1 (en) 2000-03-17 2002-07-09 International Business Machines Corporation In-situ ion implant activation and measurement apparatus
US6594446B2 (en) * 2000-12-04 2003-07-15 Vortek Industries Ltd. Heat-treating methods and systems
CN100416243C (zh) * 2001-12-26 2008-09-03 加拿大马特森技术有限公司 测量温度和热处理的方法及系统
DE10393962B4 (de) 2002-12-20 2019-03-14 Mattson Technology Inc. Verfahren und Vorrichtung zum Stützen eines Werkstücks und zur Wärmebehandlung des Werkstücks
WO2005059991A1 (en) * 2003-12-19 2005-06-30 Mattson Technology Canada Inc. Apparatuses and methods for suppressing thermally induced motion of a workpiece
TWI237857B (en) * 2004-10-21 2005-08-11 Nanya Technology Corp Method of fabricating MOS transistor by millisecond anneal
US7989888B2 (en) * 2006-08-31 2011-08-02 Infineon Technologies Autria AG Semiconductor device with a field stop zone and process of producing the same
US8454356B2 (en) * 2006-11-15 2013-06-04 Mattson Technology, Inc. Systems and methods for supporting a workpiece during heat-treating
FR2921752B1 (fr) * 2007-10-01 2009-11-13 Aplinov Procede de chauffage d'une plaque par un flux lumineux.
WO2009137940A1 (en) 2008-05-16 2009-11-19 Mattson Technology Canada, Inc. Workpiece breakage prevention method and apparatus
FR2938116B1 (fr) * 2008-11-04 2011-03-11 Aplinov Procede et dispositif de chauffage d'une couche d'une plaque par amorcage et flux lumineux.
WO2011096326A1 (ja) * 2010-02-04 2011-08-11 富士電機システムズ株式会社 半導体素子の製造方法および半導体素子の製造装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4151008A (en) * 1974-11-15 1979-04-24 Spire Corporation Method involving pulsed light processing of semiconductor devices
US4111720A (en) * 1977-03-31 1978-09-05 International Business Machines Corporation Method for forming a non-epitaxial bipolar integrated circuit
US4230505A (en) * 1979-10-09 1980-10-28 Rca Corporation Method of making an impatt diode utilizing a combination of epitaxial deposition, ion implantation and substrate removal
US4269631A (en) * 1980-01-14 1981-05-26 International Business Machines Corporation Selective epitaxy method using laser annealing for making filamentary transistors
US4318752A (en) * 1980-05-16 1982-03-09 Bell Telephone Laboratories, Incorporated Heterojunction semiconductor laser fabrication utilizing laser radiation

Also Published As

Publication number Publication date
CA1189768A (en) 1985-07-02
US4379727A (en) 1983-04-12
EP0069327A3 (en) 1984-09-12
EP0069327B1 (de) 1987-09-09
JPS5810822A (ja) 1983-01-21
JPS6244849B2 (de) 1987-09-22
EP0069327A2 (de) 1983-01-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee