DE3278588D1 - Data processing system with a plurality of host processors and peripheral devices - Google Patents

Data processing system with a plurality of host processors and peripheral devices

Info

Publication number
DE3278588D1
DE3278588D1 DE8282100723T DE3278588T DE3278588D1 DE 3278588 D1 DE3278588 D1 DE 3278588D1 DE 8282100723 T DE8282100723 T DE 8282100723T DE 3278588 T DE3278588 T DE 3278588T DE 3278588 D1 DE3278588 D1 DE 3278588D1
Authority
DE
Germany
Prior art keywords
data processing
processing system
peripheral devices
host processors
processors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282100723T
Other languages
English (en)
Inventor
Ii Edwin Raymond Videki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3278588D1 publication Critical patent/DE3278588D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2002—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant
    • G06F11/2007—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media
    • G06F11/201—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where interconnections or communication control functionality are redundant using redundant communication media between storage system components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
DE8282100723T 1981-03-06 1982-02-02 Data processing system with a plurality of host processors and peripheral devices Expired DE3278588D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/241,174 US4396984A (en) 1981-03-06 1981-03-06 Peripheral systems employing multipathing, path and access grouping

Publications (1)

Publication Number Publication Date
DE3278588D1 true DE3278588D1 (en) 1988-07-07

Family

ID=22909552

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282100723T Expired DE3278588D1 (en) 1981-03-06 1982-02-02 Data processing system with a plurality of host processors and peripheral devices

Country Status (7)

Country Link
US (1) US4396984A (de)
EP (1) EP0059838B1 (de)
JP (1) JPS57157328A (de)
AU (1) AU544724B2 (de)
CA (1) CA1171545A (de)
DE (1) DE3278588D1 (de)
ES (1) ES510176A0 (de)

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Also Published As

Publication number Publication date
EP0059838A3 (en) 1984-11-28
US4396984A (en) 1983-08-02
JPS57157328A (en) 1982-09-28
EP0059838A2 (de) 1982-09-15
JPS618462B2 (de) 1986-03-14
AU7958782A (en) 1982-09-09
ES8303747A1 (es) 1983-02-01
ES510176A0 (es) 1983-02-01
EP0059838B1 (de) 1988-06-01
AU544724B2 (en) 1985-06-13
CA1171545A (en) 1984-07-24

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