DE3377542D1 - Monolithic fast fourier transform circuit - Google Patents

Monolithic fast fourier transform circuit

Info

Publication number
DE3377542D1
DE3377542D1 DE8383300044T DE3377542T DE3377542D1 DE 3377542 D1 DE3377542 D1 DE 3377542D1 DE 8383300044 T DE8383300044 T DE 8383300044T DE 3377542 T DE3377542 T DE 3377542T DE 3377542 D1 DE3377542 D1 DE 3377542D1
Authority
DE
Germany
Prior art keywords
fourier transform
fast fourier
transform circuit
monolithic
monolithic fast
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383300044T
Other languages
English (en)
Inventor
George William Mciver
Barry Hugh Whalen
Bruce Lee Troutman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
TRW Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TRW Inc filed Critical TRW Inc
Application granted granted Critical
Publication of DE3377542D1 publication Critical patent/DE3377542D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G06F17/142—Fast Fourier transforms, e.g. using a Cooley-Tukey type algorithm
DE8383300044T 1982-01-11 1983-01-05 Monolithic fast fourier transform circuit Expired DE3377542D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/338,733 US4547862A (en) 1982-01-11 1982-01-11 Monolithic fast fourier transform circuit

Publications (1)

Publication Number Publication Date
DE3377542D1 true DE3377542D1 (en) 1988-09-01

Family

ID=23325942

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383300044T Expired DE3377542D1 (en) 1982-01-11 1983-01-05 Monolithic fast fourier transform circuit

Country Status (4)

Country Link
US (1) US4547862A (de)
EP (1) EP0083967B1 (de)
JP (1) JPS58169675A (de)
DE (1) DE3377542D1 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60163128A (ja) * 1984-02-02 1985-08-26 Nec Corp 乗算回路
FR2568036B1 (fr) * 1984-07-20 1989-06-02 Thomson Csf Circuit de calcul
FR2572820B1 (fr) * 1984-11-06 1986-12-26 Thomson Csf Dispositif de test en ligne de circuit de calcul de la transformee de fourier discrete et circuit comportant un tel dispositif
US4748579A (en) * 1985-08-14 1988-05-31 Gte Laboratories Incorporated Method and circuit for performing discrete transforms
US4791590A (en) * 1985-11-19 1988-12-13 Cornell Research Foundation, Inc. High performance signal processor
GB8611180D0 (en) * 1986-05-08 1986-06-18 Secr Defence Signal transforming device
US4823295A (en) * 1986-11-10 1989-04-18 Harris Corp. High speed signal processor
US4858164A (en) * 1987-05-29 1989-08-15 United Technologies Corporation Complex arithmetic processing
EP0377604B1 (de) * 1987-08-21 1995-12-20 Commonwealth Scientific And Industrial Research Organisation Transformationsverarbeitungsschaltung
US4868776A (en) * 1987-09-14 1989-09-19 Trw Inc. Fast fourier transform architecture using hybrid n-bit-serial arithmetic
US4959776A (en) * 1987-12-21 1990-09-25 Raytheon Company Method and apparatus for addressing a memory by array transformations
US5163017A (en) * 1990-03-23 1992-11-10 Texas Instruments Incorporated Pipelined Fast Fourier Transform (FFT) architecture
EP0535244B1 (de) * 1991-04-18 1999-06-23 Sharp Kabushiki Kaisha Quasi radix-16 prozessor und verfahren
US5917734A (en) * 1996-09-24 1999-06-29 Advanced Micro Device Inc. Parallel decimator method and apparatus
US6035313A (en) * 1997-03-24 2000-03-07 Motorola, Inc. Memory address generator for an FFT
US5831883A (en) * 1997-05-27 1998-11-03 United States Of America As Represented By The Secretary Of The Air Force Low energy consumption, high performance fast fourier transform
US6059268A (en) * 1998-05-06 2000-05-09 Santelli, Jr.; Albert Bumper system for limiting the mobility of a wheeled device
US6609140B1 (en) * 1999-11-30 2003-08-19 Mercury Computer Systems, Inc. Methods and apparatus for fast fourier transforms
US6611856B1 (en) * 1999-12-23 2003-08-26 Intel Corporation Processing multiply-accumulate operations in a single cycle
KR20020034746A (ko) * 2000-11-03 2002-05-09 윤종용 고속 및 면적효율적인 알고리즘을 적용한 고속 프리에변환 프로세서
JP2002351858A (ja) * 2001-05-30 2002-12-06 Fujitsu Ltd 処理装置
US7047268B2 (en) * 2002-03-15 2006-05-16 Texas Instruments Incorporated Address generators for mapping arrays in bit reversed order
JP2003298961A (ja) * 2002-03-29 2003-10-17 Alps Electric Co Ltd 集積回路
US7029812B2 (en) * 2002-10-25 2006-04-18 Samsung Electronics Co., Ltd. Organophotoreceptor with charge transport compound having an epoxy group
EP1426872A3 (de) * 2002-12-03 2006-02-22 STMicroelectronics Ltd. Linear skalierbare FFT/IFFT Berechnung in einem Multiprozessorsystem
EP1447752A3 (de) * 2003-02-17 2006-02-22 STMicroelectronics Pvt. Ltd Verfahren und System zur Mehrfachprozessor-FFT/IFFT-Berechnung mit minimaler Zwischenprozessorkommunikation
US7543010B2 (en) * 2003-11-03 2009-06-02 Board Of Regents, The University Of Texas System Modular pipeline fast Fourier transform
WO2008066731A2 (en) * 2006-11-22 2008-06-05 Psigenics Corporation Device and method responsive to influences of mind
US7538708B2 (en) * 2006-12-30 2009-05-26 Teradyne, Inc. Efficient, selective error reduction for parallel, time-interleaved analog-to-digital converter
US7541958B2 (en) * 2006-12-30 2009-06-02 Teradyne, Inc. Error reduction for parallel, time-interleaved analog-to-digital converter

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156920A (en) * 1977-06-30 1979-05-29 International Business Machines Corporation Computer system architecture for performing nested loop operations to effect a discrete Fourier transform
GB2006485B (en) * 1977-10-07 1982-02-10 Secr Defence Spectrum analysers
JPS5543688A (en) * 1978-09-22 1980-03-27 Fujitsu Ltd Fourier conversion device
US4241411A (en) * 1978-11-16 1980-12-23 Probe Systems, Incorporated FFT Parallel processor having mutually connected, multiple identical cards
US4229800A (en) * 1978-12-06 1980-10-21 American Microsystems, Inc. Round off correction logic for modified Booth's algorithm
JPS56147260A (en) * 1980-04-18 1981-11-16 Nec Corp Lsi for digital signal processing

Also Published As

Publication number Publication date
EP0083967A2 (de) 1983-07-20
JPS58169675A (ja) 1983-10-06
EP0083967B1 (de) 1988-07-27
US4547862A (en) 1985-10-15
EP0083967A3 (en) 1984-11-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee
8327 Change in the person/name/address of the patent owner

Owner name: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD., SEOUL/SO

8328 Change in the person/name/address of the agent

Free format text: PATENT- UND RECHTSANWAELTE WUESTHOFF & WUESTHOFF, 81541 MUENCHEN