DE3484109D1 - Vektorprozessor. - Google Patents

Vektorprozessor.

Info

Publication number
DE3484109D1
DE3484109D1 DE8484116094T DE3484109T DE3484109D1 DE 3484109 D1 DE3484109 D1 DE 3484109D1 DE 8484116094 T DE8484116094 T DE 8484116094T DE 3484109 T DE3484109 T DE 3484109T DE 3484109 D1 DE3484109 D1 DE 3484109D1
Authority
DE
Germany
Prior art keywords
vector processor
vector
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484116094T
Other languages
English (en)
Inventor
Shunichi Torii
Keiji Kojima
Masahiro Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3484109D1 publication Critical patent/DE3484109D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
DE8484116094T 1983-12-23 1984-12-21 Vektorprozessor. Expired - Lifetime DE3484109D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58242007A JPH077385B2 (ja) 1983-12-23 1983-12-23 データ処理装置

Publications (1)

Publication Number Publication Date
DE3484109D1 true DE3484109D1 (de) 1991-03-21

Family

ID=17082868

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484116094T Expired - Lifetime DE3484109D1 (de) 1983-12-23 1984-12-21 Vektorprozessor.

Country Status (4)

Country Link
US (1) US4779192A (de)
EP (1) EP0149213B1 (de)
JP (1) JPH077385B2 (de)
DE (1) DE3484109D1 (de)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890220A (en) * 1984-12-12 1989-12-26 Hitachi, Ltd. Vector processing apparatus for incrementing indices of vector operands of different length according to arithmetic operation results
EP0227900B1 (de) * 1985-12-02 1993-03-31 International Business Machines Corporation Datenverarbeitungsgerät mit Drei-Adress-Befehlen
JP2760790B2 (ja) * 1986-10-09 1998-06-04 株式会社日立製作所 データ処理装置
JPS63136168A (ja) * 1986-11-28 1988-06-08 Hitachi Ltd ベクトル計算機
US4918593A (en) * 1987-01-08 1990-04-17 Wang Laboratories, Inc. Relational database system
JPS63251835A (ja) * 1987-04-08 1988-10-19 Hitachi Ltd ベクトル処理装置
JP3070744B2 (ja) * 1987-04-10 2000-07-31 株式会社日立製作所 ベクトル処理装置
JP2753260B2 (ja) * 1987-05-13 1998-05-18 株式会社日立製作所 マージ方法
JP3079153B2 (ja) * 1987-10-07 2000-08-21 ジー． ゴルバテンコ，ジョージ メモリ・スペース・アレイ
US5261113A (en) * 1988-01-25 1993-11-09 Digital Equipment Corporation Apparatus and method for single operand register array for vector and scalar data processing operations
US5003471A (en) * 1988-09-01 1991-03-26 Gibson Glenn A Windowed programmable data transferring apparatus which uses a selective number of address offset registers and synchronizes memory access to buffer
US5136662A (en) * 1988-12-13 1992-08-04 Matsushita Electric Industrial Co., Ltd. Image processor for sequential processing of successive regions of an image
US5274835A (en) * 1988-12-20 1993-12-28 Matsushita Electric Industrial Co., Ltd. Merge device using FIFO buffers
JP2607689B2 (ja) * 1989-07-10 1997-05-07 株式会社日立製作所 ベクトル処理装置
US5241648A (en) * 1990-02-13 1993-08-31 International Business Machines Corporation Hybrid technique for joining tables
US5119324A (en) * 1990-02-20 1992-06-02 Stardent Computer Apparatus and method for performing arithmetic functions in a computer system
US5053986A (en) * 1990-02-21 1991-10-01 Stardent Computer, Inc. Circuit for preservation of sign information in operations for comparison of the absolute value of operands
US5210870A (en) * 1990-03-27 1993-05-11 International Business Machines Database sort and merge apparatus with multiple memory arrays having alternating access
US5287494A (en) * 1990-10-18 1994-02-15 International Business Machines Corporation Sorting/merging tree for determining a next tournament champion in each cycle by simultaneously comparing records in a path of the previous tournament champion
US5848286A (en) * 1994-03-29 1998-12-08 Cray Research, Inc. Vector word shift by vo shift count in vector supercomputer processor
JP3518034B2 (ja) * 1995-03-30 2004-04-12 三菱電機株式会社 ソート方法並びにソート処理装置並びにデータ処理装置
TW439380B (en) * 1995-10-09 2001-06-07 Hitachi Ltd Terminal apparatus
US6195747B1 (en) * 1998-09-28 2001-02-27 Mentor Arc Inc. System and method for reducing data traffic between a processor and a system controller in a data processing system
US6424969B1 (en) 1999-07-20 2002-07-23 Inmentia, Inc. System and method for organizing data
KR100331565B1 (ko) * 1999-12-17 2002-04-06 윤종용 매트릭스 연산 장치 및 매트릭스 연산기능을 갖는 디지털신호처리 장치
US6944619B2 (en) * 2001-04-12 2005-09-13 Primentia, Inc. System and method for organizing data
US20040158561A1 (en) * 2003-02-04 2004-08-12 Gruenwald Bjorn J. System and method for translating languages using an intermediate content space
US10649775B2 (en) * 2013-07-15 2020-05-12 Texas Instrum Ents Incorporated Converting a stream of data using a lookaside buffer
US9355061B2 (en) 2014-01-28 2016-05-31 Arm Limited Data processing apparatus and method for performing scan operations
US10754818B2 (en) * 2014-08-12 2020-08-25 ArchiTek Corporation Multiprocessor device for executing vector processing commands
US10831502B2 (en) 2018-11-06 2020-11-10 International Business Machines Corporation Migration of partially completed instructions
US10831478B2 (en) * 2018-11-06 2020-11-10 International Business Machines Corporation Sort and merge instruction for a general-purpose processor
US10831503B2 (en) * 2018-11-06 2020-11-10 International Business Machines Corporation Saving and restoring machine state between multiple executions of an instruction

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3794984A (en) * 1971-10-14 1974-02-26 Raytheon Co Array processor for digital computers
JPS5148937A (en) * 1974-10-25 1976-04-27 Fujitsu Ltd Kiokusochi niokeru junjoseigyohoshiki
JPS5852265B2 (ja) * 1977-01-12 1983-11-21 株式会社日立製作所 デ−タ処理装置
JPS6024985B2 (ja) * 1978-08-31 1985-06-15 富士通株式会社 デ−タ処理方式
JPS57134774A (en) * 1981-02-13 1982-08-20 Hitachi Ltd Vector operating device
US4412285A (en) * 1981-04-01 1983-10-25 Teradata Corporation Multiprocessor intercommunication system and method
JPS59160267A (ja) * 1983-03-02 1984-09-10 Hitachi Ltd ベクトル処理装置
JPS6077265A (ja) * 1983-10-05 1985-05-01 Hitachi Ltd ベクトル処理装置

Also Published As

Publication number Publication date
EP0149213A3 (en) 1988-01-07
JPH077385B2 (ja) 1995-01-30
US4779192A (en) 1988-10-18
EP0149213B1 (de) 1991-02-13
JPS60134973A (ja) 1985-07-18
EP0149213A2 (de) 1985-07-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee