DE3586041D1 - Hierarchisches datenuebertragungssystem. - Google Patents

Hierarchisches datenuebertragungssystem.

Info

Publication number
DE3586041D1
DE3586041D1 DE8585115568T DE3586041T DE3586041D1 DE 3586041 D1 DE3586041 D1 DE 3586041D1 DE 8585115568 T DE8585115568 T DE 8585115568T DE 3586041 T DE3586041 T DE 3586041T DE 3586041 D1 DE3586041 D1 DE 3586041D1
Authority
DE
Germany
Prior art keywords
data transfer
transfer system
hierarchical data
hierarchical
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585115568T
Other languages
English (en)
Inventor
Masakazu Mori
Takeo Fukushima
Naonobu Fujimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3586041D1 publication Critical patent/DE3586041D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Time-Division Multiplex Systems (AREA)
DE8585115568T 1984-12-06 1985-12-06 Hierarchisches datenuebertragungssystem. Expired - Fee Related DE3586041D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59256545A JPS61135243A (ja) 1984-12-06 1984-12-06 多重伝送方法

Publications (1)

Publication Number Publication Date
DE3586041D1 true DE3586041D1 (de) 1992-06-17

Family

ID=17294121

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585115568T Expired - Fee Related DE3586041D1 (de) 1984-12-06 1985-12-06 Hierarchisches datenuebertragungssystem.

Country Status (6)

Country Link
US (1) US4727541A (de)
EP (1) EP0184221B1 (de)
JP (1) JPS61135243A (de)
AU (1) AU564443B2 (de)
CA (1) CA1246251A (de)
DE (1) DE3586041D1 (de)

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CA2024809C (en) * 1989-01-09 1994-11-01 Masanori Hiramoto Digital signal multiplexing apparatus and demultiplexing apparatus
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US5177742A (en) * 1989-03-04 1993-01-05 U.S. Philips Corporation Demultiplexer for a serial and isochronous multiplex signal
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JP3158213B2 (ja) * 1991-09-12 2001-04-23 富士通株式会社 並列伝送方法および装置
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JP3272533B2 (ja) * 1994-03-31 2002-04-08 三菱電機株式会社 マルチプレクサ回路およびデマルチプレクサ回路
JP2845180B2 (ja) * 1995-10-18 1999-01-13 日本電気株式会社 Ａｔｍセル多重化装置
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US6269451B1 (en) 1998-02-27 2001-07-31 Micron Technology, Inc. Method and apparatus for adjusting data timing by delaying clock signal
US6349399B1 (en) 1998-09-03 2002-02-19 Micron Technology, Inc. Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
US6188702B1 (en) * 1998-11-17 2001-02-13 Inrange Technologies Corporation High speed linking module
US6374360B1 (en) 1998-12-11 2002-04-16 Micron Technology, Inc. Method and apparatus for bit-to-bit timing correction of a high speed memory bus
US6470060B1 (en) 1999-03-01 2002-10-22 Micron Technology, Inc. Method and apparatus for generating a phase dependent control signal
US6917661B1 (en) * 1999-09-24 2005-07-12 Cypress Semiconductor Corp. Method, architecture and circuitry for controlling pulse width in a phase and/or frequency detector
US6724220B1 (en) 2000-10-26 2004-04-20 Cyress Semiconductor Corporation Programmable microcontroller architecture (mixed analog/digital)
US8176296B2 (en) 2000-10-26 2012-05-08 Cypress Semiconductor Corporation Programmable microcontroller architecture
US8149048B1 (en) 2000-10-26 2012-04-03 Cypress Semiconductor Corporation Apparatus and method for programmable power management in a programmable analog circuit block
US8103496B1 (en) 2000-10-26 2012-01-24 Cypress Semicondutor Corporation Breakpoint control in an in-circuit emulation system
US8160864B1 (en) 2000-10-26 2012-04-17 Cypress Semiconductor Corporation In-circuit emulator and pod synchronized boot
US7765095B1 (en) 2000-10-26 2010-07-27 Cypress Semiconductor Corporation Conditional branching in an in-circuit emulation system
US6801989B2 (en) * 2001-06-28 2004-10-05 Micron Technology, Inc. Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
US6977980B2 (en) * 2001-08-29 2005-12-20 Rambus Inc. Timing synchronization methods and systems for transmit parallel interfaces
US7406674B1 (en) 2001-10-24 2008-07-29 Cypress Semiconductor Corporation Method and apparatus for generating microcontroller configuration information
US8078970B1 (en) 2001-11-09 2011-12-13 Cypress Semiconductor Corporation Graphical user interface with user-selectable list-box
US8042093B1 (en) 2001-11-15 2011-10-18 Cypress Semiconductor Corporation System providing automatic source code generation for personalization and parameterization of user modules
US7774190B1 (en) 2001-11-19 2010-08-10 Cypress Semiconductor Corporation Sleep and stall in an in-circuit emulation system
US8069405B1 (en) 2001-11-19 2011-11-29 Cypress Semiconductor Corporation User interface for efficiently browsing an electronic document using data-driven tabs
US6971004B1 (en) 2001-11-19 2005-11-29 Cypress Semiconductor Corp. System and method of dynamically reconfiguring a programmable integrated circuit
US7770113B1 (en) 2001-11-19 2010-08-03 Cypress Semiconductor Corporation System and method for dynamically generating a configuration datasheet
US7844437B1 (en) 2001-11-19 2010-11-30 Cypress Semiconductor Corporation System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit
US8103497B1 (en) 2002-03-28 2012-01-24 Cypress Semiconductor Corporation External interface for event architecture
US7308608B1 (en) 2002-05-01 2007-12-11 Cypress Semiconductor Corporation Reconfigurable testing system and method
DE10233681B4 (de) * 2002-07-24 2005-12-01 Infineon Technologies Ag Schaltungsanordnung zur Ansteuerung wenigstens eines Verbrauchers
US7319706B2 (en) * 2002-08-12 2008-01-15 Broadcom Corporation Symmetrical clock distribution in multi-stage high speed data conversion circuits
US7761845B1 (en) 2002-09-09 2010-07-20 Cypress Semiconductor Corporation Method for parameterizing a user module
JP2004147075A (ja) * 2002-10-24 2004-05-20 Fujitsu Ltd 信号多重化回路及び光通信システム送信器
US7168027B2 (en) 2003-06-12 2007-01-23 Micron Technology, Inc. Dynamic synchronization of data capture on an optical or other high speed communications link
US7234070B2 (en) * 2003-10-27 2007-06-19 Micron Technology, Inc. System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding
US7295049B1 (en) 2004-03-25 2007-11-13 Cypress Semiconductor Corporation Method and circuit for rapid alignment of signals
US8069436B2 (en) 2004-08-13 2011-11-29 Cypress Semiconductor Corporation Providing hardware independence to automate code generation of processing device firmware
US8286125B2 (en) 2004-08-13 2012-10-09 Cypress Semiconductor Corporation Model for a hardware device-independent method of defining embedded firmware for programmable systems
US7332976B1 (en) 2005-02-04 2008-02-19 Cypress Semiconductor Corporation Poly-phase frequency synthesis oscillator
US7400183B1 (en) 2005-05-05 2008-07-15 Cypress Semiconductor Corporation Voltage controlled oscillator delay cell and method
US8089461B2 (en) * 2005-06-23 2012-01-03 Cypress Semiconductor Corporation Touch wake for electronic devices
US8085067B1 (en) 2005-12-21 2011-12-27 Cypress Semiconductor Corporation Differential-to-single ended signal converter circuit and method
US8067948B2 (en) 2006-03-27 2011-11-29 Cypress Semiconductor Corporation Input/output multiplexer bus
US8040266B2 (en) 2007-04-17 2011-10-18 Cypress Semiconductor Corporation Programmable sigma-delta analog-to-digital converter
US8026739B2 (en) 2007-04-17 2011-09-27 Cypress Semiconductor Corporation System level interconnect with programmable switching
US8516025B2 (en) * 2007-04-17 2013-08-20 Cypress Semiconductor Corporation Clock driven dynamic datapath chaining
US9564902B2 (en) 2007-04-17 2017-02-07 Cypress Semiconductor Corporation Dynamically configurable and re-configurable data path
US8092083B2 (en) 2007-04-17 2012-01-10 Cypress Semiconductor Corporation Temperature sensor with digital bandgap
US8130025B2 (en) * 2007-04-17 2012-03-06 Cypress Semiconductor Corporation Numerical band gap
US7737724B2 (en) 2007-04-17 2010-06-15 Cypress Semiconductor Corporation Universal digital block interconnection and channel routing
US8065653B1 (en) 2007-04-25 2011-11-22 Cypress Semiconductor Corporation Configuration of programmable IC design elements
US8266575B1 (en) 2007-04-25 2012-09-11 Cypress Semiconductor Corporation Systems and methods for dynamically reconfiguring a programmable system on a chip
US9720805B1 (en) 2007-04-25 2017-08-01 Cypress Semiconductor Corporation System and method for controlling a target device
US8049569B1 (en) 2007-09-05 2011-11-01 Cypress Semiconductor Corporation Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes
US20100135666A1 (en) * 2008-11-28 2010-06-03 Electronics And Telecommunications Research Institute Clock phase aligning apparatus for burst-mode data
US9448964B2 (en) 2009-05-04 2016-09-20 Cypress Semiconductor Corporation Autonomous control in a programmable system
WO2019239537A1 (ja) * 2018-06-14 2019-12-19 株式会社ソシオネクスト 分周回路、通信回路、及び集積回路

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1246879A (en) * 1969-06-17 1971-09-22 Marconi Co Ltd Improvements in or relating to digital signal multiplexing systems
DE2832855C3 (de) * 1978-07-26 1981-01-15 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Übertragen von Daten
JPS5833334A (ja) * 1981-08-21 1983-02-26 Hitachi Ltd 時分割多重化装置
JPS5887938A (ja) * 1981-11-20 1983-05-25 Hitachi Ltd インタフエ−ス伝送方式
JPS58200654A (ja) * 1982-05-18 1983-11-22 Nec Corp 通信装置
JPS59135946A (ja) * 1983-01-25 1984-08-04 Nec Corp デイジタル同期多重変換方式
US4519073A (en) * 1983-06-20 1985-05-21 At&T Bell Laboratories Bit compression multiplexer
US4538286A (en) * 1983-07-26 1985-08-27 Gte Communications Products Corporation Data rate conversion and supervisory bit insertion in a data system
US4593390A (en) * 1984-08-09 1986-06-03 Honeywell, Inc. Pipeline multiplexer

Also Published As

Publication number Publication date
AU5070285A (en) 1986-06-12
US4727541A (en) 1988-02-23
EP0184221B1 (de) 1992-05-13
EP0184221A2 (de) 1986-06-11
EP0184221A3 (en) 1988-09-21
CA1246251A (en) 1988-12-06
AU564443B2 (en) 1987-08-13
JPS61135243A (ja) 1986-06-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee