DE3686091T2 - Integrierte halbleiterschaltungen mit schaltungselementen zur untersuchung der integrierten schaltungen sowie mittel zum pruefen der schaltungselemente. - Google Patents

Integrierte halbleiterschaltungen mit schaltungselementen zur untersuchung der integrierten schaltungen sowie mittel zum pruefen der schaltungselemente.

Info

Publication number
DE3686091T2
DE3686091T2 DE8686303791T DE3686091T DE3686091T2 DE 3686091 T2 DE3686091 T2 DE 3686091T2 DE 8686303791 T DE8686303791 T DE 8686303791T DE 3686091 T DE3686091 T DE 3686091T DE 3686091 T2 DE3686091 T2 DE 3686091T2
Authority
DE
Germany
Prior art keywords
circuit elements
circuits
integrated
examining
testing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686303791T
Other languages
English (en)
Other versions
DE3686091D1 (de
Inventor
Atsushi Takeuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3686091D1 publication Critical patent/DE3686091D1/de
Publication of DE3686091T2 publication Critical patent/DE3686091T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
DE8686303791T 1985-05-20 1986-05-19 Integrierte halbleiterschaltungen mit schaltungselementen zur untersuchung der integrierten schaltungen sowie mittel zum pruefen der schaltungselemente. Expired - Fee Related DE3686091T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60107827A JPS61265829A (ja) 1985-05-20 1985-05-20 半導体集積回路

Publications (2)

Publication Number Publication Date
DE3686091D1 DE3686091D1 (de) 1992-08-27
DE3686091T2 true DE3686091T2 (de) 1993-03-18

Family

ID=14469041

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686303791T Expired - Fee Related DE3686091T2 (de) 1985-05-20 1986-05-19 Integrierte halbleiterschaltungen mit schaltungselementen zur untersuchung der integrierten schaltungen sowie mittel zum pruefen der schaltungselemente.

Country Status (5)

Country Link
US (1) US4743841A (de)
EP (1) EP0202905B1 (de)
JP (1) JPS61265829A (de)
KR (1) KR900006484B1 (de)
DE (1) DE3686091T2 (de)

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US5969538A (en) 1996-10-31 1999-10-19 Texas Instruments Incorporated Semiconductor wafer with interconnect between dies for testing and a process of testing
US5994912A (en) * 1995-10-31 1999-11-30 Texas Instruments Incorporated Fault tolerant selection of die on wafer
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DE69724318T2 (de) * 1996-04-02 2004-05-27 STMicroelectronics, Inc., Carrollton Prüfung und Reparatur einer eingebetteten Speicherschaltung
US5654895A (en) * 1996-04-04 1997-08-05 Lsi Logic Corporation Process monitor usig impedance controlled I/O controller
US5751161A (en) * 1996-04-04 1998-05-12 Lsi Logic Corporation Update scheme for impedance controlled I/O buffers
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US6400171B2 (en) * 1999-03-22 2002-06-04 International Business Machines Corp. Method and system for processing integrated circuits
US6407569B1 (en) 1999-03-24 2002-06-18 International Business Machines Corporation Integrated circuit with in situ circuit arrangement for testing integrity of differential receiver inputs
US7058862B2 (en) 2000-05-26 2006-06-06 Texas Instruments Incorporated Selecting different 1149.1 TAP domains from update-IR state
JP3277914B2 (ja) * 1999-04-30 2002-04-22 日本電気株式会社 プロセスパラメータ測定回路を有する集積回路装置
US6728915B2 (en) 2000-01-10 2004-04-27 Texas Instruments Incorporated IC with shared scan cells selectively connected in scan path
US6769080B2 (en) 2000-03-09 2004-07-27 Texas Instruments Incorporated Scan circuit low power adapter with counter
US6498507B1 (en) * 2000-04-20 2002-12-24 Analog Devices, Inc. Circuit for testing an integrated circuit
DE10029835C1 (de) * 2000-06-16 2001-10-25 Infineon Technologies Ag Integrierte Schaltung mit Testbetrieb und Testanordnung zum Testen einer integrierten Schaltung
JP2002170886A (ja) * 2000-09-19 2002-06-14 Seiko Instruments Inc 基準電圧用半導体装置とその製造方法
US7240254B2 (en) * 2000-09-21 2007-07-03 Inapac Technology, Inc Multiple power levels for a chip within a multi-chip semiconductor package
US6812726B1 (en) * 2002-11-27 2004-11-02 Inapac Technology, Inc. Entering test mode and accessing of a packaged semiconductor device
US7444575B2 (en) * 2000-09-21 2008-10-28 Inapac Technology, Inc. Architecture and method for testing of an integrated circuit device
US8001439B2 (en) * 2001-09-28 2011-08-16 Rambus Inc. Integrated circuit testing module including signal shaping interface
US8286046B2 (en) 2001-09-28 2012-10-09 Rambus Inc. Integrated circuit testing module including signal shaping interface
US7313740B2 (en) * 2002-07-25 2007-12-25 Inapac Technology, Inc. Internally generating patterns for testing in an integrated circuit device
US8166361B2 (en) * 2001-09-28 2012-04-24 Rambus Inc. Integrated circuit testing module configured for set-up and hold time testing
JP3943890B2 (ja) * 2001-10-18 2007-07-11 富士通株式会社 半導体装置
US7061263B1 (en) * 2001-11-15 2006-06-13 Inapac Technology, Inc. Layout and use of bond pads and probe pads for testing of integrated circuits devices
US8063650B2 (en) 2002-11-27 2011-11-22 Rambus Inc. Testing fuse configurations in semiconductor devices
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US7609079B2 (en) * 2006-03-02 2009-10-27 Dialog Semiconductor Gmbh Probeless DC testing of CMOS I/O circuits
JP5152958B2 (ja) * 2007-04-09 2013-02-27 株式会社コスモデザイン 半導体集積回路装置
US7772867B2 (en) * 2008-02-26 2010-08-10 Texas Instruments Incorporated Structures for testing and locating defects in integrated circuits
CN103915416B (zh) * 2013-01-08 2016-12-28 联咏科技股份有限公司 具有薄膜覆晶封装的电子装置
US9846192B2 (en) * 2015-02-25 2017-12-19 Nxp B.V. Switched probe contact

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DE2905271A1 (de) * 1979-02-12 1980-08-21 Philips Patentverwaltung Integrierte schaltungsanordnung in mos-technik mit feldeffekttransistoren
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DE3232215A1 (de) * 1982-08-30 1984-03-01 Siemens AG, 1000 Berlin und 8000 München Monolithisch integrierte digitale halbleiterschaltung
WO1984002580A1 (en) * 1982-12-27 1984-07-05 Storage Technology Partners Vlsi chip with integral testing circuit

Also Published As

Publication number Publication date
JPS61265829A (ja) 1986-11-25
US4743841A (en) 1988-05-10
EP0202905A2 (de) 1986-11-26
KR900006484B1 (ko) 1990-09-01
JPH0351307B2 (de) 1991-08-06
KR860009431A (ko) 1986-12-22
DE3686091D1 (de) 1992-08-27
EP0202905B1 (de) 1992-07-22
EP0202905A3 (en) 1988-01-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee