DE3880343T2 - Video-ram mit vielfachen ebenen. - Google Patents

Video-ram mit vielfachen ebenen.

Info

Publication number
DE3880343T2
DE3880343T2 DE8888301432T DE3880343T DE3880343T2 DE 3880343 T2 DE3880343 T2 DE 3880343T2 DE 8888301432 T DE8888301432 T DE 8888301432T DE 3880343 T DE3880343 T DE 3880343T DE 3880343 T2 DE3880343 T2 DE 3880343T2
Authority
DE
Germany
Prior art keywords
video ram
multiple levels
levels
ram
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888301432T
Other languages
English (en)
Other versions
DE3880343D1 (de
Inventor
Hisashige Ando
Saburo Sasanuma
Takahiro Sakuraba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE3880343D1 publication Critical patent/DE3880343D1/de
Application granted granted Critical
Publication of DE3880343T2 publication Critical patent/DE3880343T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/022Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using memory planes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
DE8888301432T 1987-02-20 1988-02-19 Video-ram mit vielfachen ebenen. Expired - Fee Related DE3880343T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62035663A JPS63204595A (ja) 1987-02-20 1987-02-20 マルチプレ−ンビデオram構成方式

Publications (2)

Publication Number Publication Date
DE3880343D1 DE3880343D1 (de) 1993-05-27
DE3880343T2 true DE3880343T2 (de) 1993-07-29

Family

ID=12448109

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888301432T Expired - Fee Related DE3880343T2 (de) 1987-02-20 1988-02-19 Video-ram mit vielfachen ebenen.

Country Status (4)

Country Link
US (1) US4933879A (de)
EP (1) EP0279693B1 (de)
JP (1) JPS63204595A (de)
DE (1) DE3880343T2 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5659673A (en) * 1988-12-16 1997-08-19 Canon Kabushiki Kaisha Image processing apparatus
US5083257A (en) * 1989-04-27 1992-01-21 Motorola, Inc. Bit plane partitioning for graphic displays
US5150312A (en) * 1989-06-16 1992-09-22 International Business Machines Corporation Animation processor method and apparatus
US5233690A (en) * 1989-07-28 1993-08-03 Texas Instruments Incorporated Video graphics display memory swizzle logic and expansion circuit and method
EP0427114A3 (en) * 1989-11-07 1992-07-15 Micron Technology, Inc. High speed bit mask register architecture
US5251296A (en) * 1990-03-16 1993-10-05 Hewlett-Packard Company Methods and apparatus for generating arbitrarily addressed, arbitrarily shaped tiles in computer graphics systems
US5255363A (en) * 1990-06-19 1993-10-19 Mentor Graphics Corporation Graph-based programming system and associated method
JP3015140B2 (ja) * 1991-05-29 2000-03-06 株式会社日立製作所 表示制御装置
JP2583003B2 (ja) * 1992-09-11 1997-02-19 インターナショナル・ビジネス・マシーンズ・コーポレイション グラフィックス表示システムにおけるイメージ表示方法、フレーム・バッファ及びグラフィックス表示システム
US5479606A (en) * 1993-07-21 1995-12-26 Pgm Systems, Inc. Data display apparatus for displaying patterns using samples of signal data
US5504855A (en) * 1993-10-29 1996-04-02 Sun Microsystems, Inc. Method and apparatus for providing fast multi-color storage in a frame buffer
DE69432512T2 (de) * 1993-10-29 2004-04-22 Sun Microsystems, Inc., Mountain View Für fensterumgebungsoperationen entworfenes rasterpuffersystem
US5533187A (en) * 1993-10-29 1996-07-02 Sun Microsystems, Inc Multiple block mode operations in a frame buffer system designed for windowing operations
JPH07146813A (ja) * 1993-11-22 1995-06-06 Nec Corp 論理演算機能付画像メモリ
JP2919774B2 (ja) * 1994-07-01 1999-07-19 ディジタル イクイプメント コーポレイション 深いフレームバッファにおいて浅いピクセルを迅速に指示してコピーする方法
US5619228A (en) * 1994-07-25 1997-04-08 Texas Instruments Incorporated Method for reducing temporal artifacts in digital video systems
US5577193A (en) * 1994-09-28 1996-11-19 International Business Machines Corporation Multiple data registers and addressing technique therefore for block/flash writing main memory of a DRAM/VRAM
DE19649075B4 (de) * 1995-11-29 2005-04-14 Matsushita Electric Industrial Co., Ltd., Kadoma Digitale Aufzeichnungs- und Wiedergabe-Vorrichtung für Audio/Video-Daten
US6281950B1 (en) 1997-06-16 2001-08-28 Display Laboratories, Inc. High speed digital zone control
DE10105627B4 (de) * 2000-03-20 2007-06-21 International Business Machines Corp. Mehrfachanschlussspeichereinrichtung, Verfahren und System zum Betrieb einer Mehrfachanschlussspeichereinrichtung
US7627712B2 (en) * 2005-03-22 2009-12-01 Sigmatel, Inc. Method and system for managing multi-plane memory devices
US8045021B2 (en) 2006-01-05 2011-10-25 Qualcomm Incorporated Memory organizational scheme and controller architecture for image and video processing
US7280398B1 (en) * 2006-08-31 2007-10-09 Micron Technology, Inc. System and memory for sequential multi-plane page memory operations

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5837948A (ja) * 1981-08-31 1983-03-05 Toshiba Corp 積層半導体記憶装置
US4562435A (en) * 1982-09-29 1985-12-31 Texas Instruments Incorporated Video display system using serial/parallel access memories
US4823119A (en) * 1982-12-22 1989-04-18 Tokyo Shibaura Denki Kabushiki Kaisha Pattern write control circuit
JPS60245034A (ja) * 1984-05-18 1985-12-04 Ascii Corp デイスプレイコントロ−ラ
JP2735173B2 (ja) * 1985-05-20 1998-04-02 株式会社日立製作所 ワンチップメモリデバイス
US4823281A (en) * 1985-04-30 1989-04-18 Ibm Corporation Color graphic processor for performing logical operations
JPH0711915B2 (ja) * 1985-06-17 1995-02-08 株式会社日立製作所 半導体記憶装置

Also Published As

Publication number Publication date
DE3880343D1 (de) 1993-05-27
US4933879A (en) 1990-06-12
EP0279693A3 (en) 1990-01-10
EP0279693A2 (de) 1988-08-24
EP0279693B1 (de) 1993-04-21
JPS63204595A (ja) 1988-08-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee