DE60001600D1 - Methode zur Herstellung von vertikalen Transistoren - Google Patents
Methode zur Herstellung von vertikalen TransistorenInfo
- Publication number
- DE60001600D1 DE60001600D1 DE60001600T DE60001600T DE60001600D1 DE 60001600 D1 DE60001600 D1 DE 60001600D1 DE 60001600 T DE60001600 T DE 60001600T DE 60001600 T DE60001600 T DE 60001600T DE 60001600 D1 DE60001600 D1 DE 60001600D1
- Authority
- DE
- Germany
- Prior art keywords
- vertical transistors
- making vertical
- making
- transistors
- vertical
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78642—Vertical transistors
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/335,707 US6197641B1 (en) | 1998-08-28 | 1999-06-18 | Process for fabricating vertical transistors |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60001600D1 true DE60001600D1 (de) | 2003-04-17 |
DE60001600T2 DE60001600T2 (de) | 2003-11-13 |
Family
ID=23312924
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60001600T Expired - Lifetime DE60001600T2 (de) | 1999-06-18 | 2000-06-06 | Methode zur Herstellung von vertikalen Transistoren |
Country Status (5)
Country | Link |
---|---|
US (1) | US6197641B1 (de) |
EP (1) | EP1063694B1 (de) |
JP (1) | JP2001057427A (de) |
KR (1) | KR100392278B1 (de) |
DE (1) | DE60001600T2 (de) |
Families Citing this family (64)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6483736B2 (en) * | 1998-11-16 | 2002-11-19 | Matrix Semiconductor, Inc. | Vertically stacked field programmable nonvolatile memory and method of fabrication |
US6551946B1 (en) | 1999-06-24 | 2003-04-22 | Agere Systems Inc. | Two-step oxidation process for oxidizing a silicon substrate wherein the first step is carried out at a temperature below the viscoelastic temperature of silicon dioxide and the second step is carried out at a temperature above the viscoelastic temperature |
US6670242B1 (en) | 1999-06-24 | 2003-12-30 | Agere Systems Inc. | Method for making an integrated circuit device including a graded, grown, high quality gate oxide layer and a nitride layer |
US6420822B1 (en) * | 1999-07-15 | 2002-07-16 | Northrop Grumman Corporation | Thermionic electron emitter based upon the triple-junction effect |
US20030235957A1 (en) * | 2002-06-25 | 2003-12-25 | Samir Chaudhry | Method and structure for graded gate oxides on vertical and non-planar surfaces |
US8575719B2 (en) | 2000-04-28 | 2013-11-05 | Sandisk 3D Llc | Silicon nitride antifuse for use in diode-antifuse memory arrays |
US6888750B2 (en) * | 2000-04-28 | 2005-05-03 | Matrix Semiconductor, Inc. | Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication |
DE10036897C1 (de) | 2000-07-28 | 2002-01-03 | Infineon Technologies Ag | Feldeffekttransistor, Schaltungsanordnung und Verfahren zum Herstellen eines Feldeffekttransistors |
EP2988331B1 (de) | 2000-08-14 | 2019-01-09 | SanDisk Technologies LLC | Halbleiterspeicherbauelement |
US6426259B1 (en) * | 2000-11-15 | 2002-07-30 | Advanced Micro Devices, Inc. | Vertical field effect transistor with metal oxide as sidewall gate insulator |
US6455377B1 (en) * | 2001-01-19 | 2002-09-24 | Chartered Semiconductor Manufacturing Ltd. | Method to form very high mobility vertical channel transistor by selective deposition of SiGe or multi-quantum wells (MQWs) |
US6649451B1 (en) | 2001-02-02 | 2003-11-18 | Matrix Semiconductor, Inc. | Structure and method for wafer comprising dielectric and semiconductor |
US7352199B2 (en) * | 2001-02-20 | 2008-04-01 | Sandisk Corporation | Memory card with enhanced testability and methods of making and using the same |
US6897514B2 (en) * | 2001-03-28 | 2005-05-24 | Matrix Semiconductor, Inc. | Two mask floating gate EEPROM and method of making |
US6841813B2 (en) * | 2001-08-13 | 2005-01-11 | Matrix Semiconductor, Inc. | TFT mask ROM and method for making same |
US6593624B2 (en) | 2001-09-25 | 2003-07-15 | Matrix Semiconductor, Inc. | Thin film transistors with vertically offset drain regions |
US6525953B1 (en) | 2001-08-13 | 2003-02-25 | Matrix Semiconductor, Inc. | Vertically-stacked, field-programmable, nonvolatile memory and method of fabrication |
US6843421B2 (en) | 2001-08-13 | 2005-01-18 | Matrix Semiconductor, Inc. | Molded memory module and method of making the module absent a substrate support |
US6690040B2 (en) * | 2001-09-10 | 2004-02-10 | Agere Systems Inc. | Vertical replacement-gate junction field-effect transistor |
US20030052365A1 (en) * | 2001-09-18 | 2003-03-20 | Samir Chaudhry | Structure and fabrication method for capacitors integratible with vertical replacement gate transistors |
US6759730B2 (en) | 2001-09-18 | 2004-07-06 | Agere Systems Inc. | Bipolar junction transistor compatible with vertical replacement gate transistor |
US6686604B2 (en) | 2001-09-21 | 2004-02-03 | Agere Systems Inc. | Multiple operating voltage vertical replacement-gate (VRG) transistor |
US6709904B2 (en) * | 2001-09-28 | 2004-03-23 | Agere Systems Inc. | Vertical replacement-gate silicon-on-insulator transistor |
US6624485B2 (en) | 2001-11-05 | 2003-09-23 | Matrix Semiconductor, Inc. | Three-dimensional, mask-programmed read only memory |
KR100406537B1 (ko) * | 2001-12-03 | 2003-11-20 | 주식회사 하이닉스반도체 | 반도체장치의 제조 방법 |
US6773994B2 (en) * | 2001-12-26 | 2004-08-10 | Agere Systems Inc. | CMOS vertical replacement gate (VRG) transistors |
KR100406578B1 (ko) * | 2001-12-29 | 2003-11-20 | 동부전자 주식회사 | 반도체 소자의 제조방법 |
US6731011B2 (en) | 2002-02-19 | 2004-05-04 | Matrix Semiconductor, Inc. | Memory module having interconnected and stacked integrated circuits |
US6853049B2 (en) * | 2002-03-13 | 2005-02-08 | Matrix Semiconductor, Inc. | Silicide-silicon oxide-semiconductor antifuse device and method of making |
US6784101B1 (en) * | 2002-05-16 | 2004-08-31 | Advanced Micro Devices Inc | Formation of high-k gate dielectric layers for MOS devices fabricated on strained lattice semiconductor substrates with minimized stress relaxation |
US6635924B1 (en) * | 2002-06-06 | 2003-10-21 | Agere Systems Inc. | Ultra thin body vertical replacement gate MOSFET |
US6737675B2 (en) | 2002-06-27 | 2004-05-18 | Matrix Semiconductor, Inc. | High density 3D rail stack arrays |
US6762094B2 (en) | 2002-09-27 | 2004-07-13 | Hewlett-Packard Development Company, L.P. | Nanometer-scale semiconductor devices and method of making |
US6632712B1 (en) * | 2002-10-03 | 2003-10-14 | Chartered Semiconductor Manufacturing Ltd. | Method of fabricating variable length vertical transistors |
DE10328072B4 (de) * | 2003-06-23 | 2007-03-15 | Infineon Technologies Ag | Verfahren zur Herstellung von Halbleiterbauelementen als Stacked-Mehrfach-Gatter |
US7202186B2 (en) * | 2003-07-31 | 2007-04-10 | Tokyo Electron Limited | Method of forming uniform ultra-thin oxynitride layers |
US7235440B2 (en) * | 2003-07-31 | 2007-06-26 | Tokyo Electron Limited | Formation of ultra-thin oxide layers by self-limiting interfacial oxidation |
US20070034909A1 (en) * | 2003-09-22 | 2007-02-15 | James Stasiak | Nanometer-scale semiconductor devices and method of making |
DE10350751B4 (de) * | 2003-10-30 | 2008-04-24 | Infineon Technologies Ag | Verfahren zum Herstellen eines vertikalen Feldeffekttransistors und Feldeffekt-Speichertransistor, insbesondere FLASH-Speichertransistor |
US7138302B2 (en) * | 2004-01-12 | 2006-11-21 | Advanced Micro Devices, Inc. | Method of fabricating an integrated circuit channel region |
US7372091B2 (en) * | 2004-01-27 | 2008-05-13 | Micron Technology, Inc. | Selective epitaxy vertical integrated circuit components |
US7026689B2 (en) * | 2004-08-27 | 2006-04-11 | Taiwan Semiconductor Manufacturing Company | Metal gate structure for MOS devices |
US7504685B2 (en) | 2005-06-28 | 2009-03-17 | Micron Technology, Inc. | Oxide epitaxial isolation |
FR2897204B1 (fr) * | 2006-02-07 | 2008-05-30 | Ecole Polytechnique Etablissem | Structure de transistor vertical et procede de fabrication |
TWI305669B (en) * | 2006-07-14 | 2009-01-21 | Nanya Technology Corp | Method for making a raised vertical channel transistor device |
US20080122010A1 (en) * | 2006-11-02 | 2008-05-29 | International Business Machines Corporation | Transistor having source/drain region only under sidewall spacer except for contacts and method |
KR100781580B1 (ko) * | 2006-12-07 | 2007-12-03 | 한국전자통신연구원 | 이중 구조 핀 전계 효과 트랜지스터 및 그 제조 방법 |
JP5468390B2 (ja) * | 2008-01-29 | 2014-04-09 | ユニサンティス エレクトロニクス シンガポール プライベート リミテッド | 半導体装置およびその製造方法 |
EP2315239A1 (de) * | 2009-10-23 | 2011-04-27 | Imec | Verfahren zur Bildung von monokristallinem Germanium oder Silizium-Germanium |
US8623757B2 (en) * | 2011-09-29 | 2014-01-07 | Eastmak Kodak Company | Producing a vertical transistor including reentrant profile |
CN102623343B (zh) * | 2012-03-14 | 2014-06-04 | 上海华力微电子有限公司 | 半导体器件侧墙空洞层制备方法 |
US9099423B2 (en) * | 2013-07-12 | 2015-08-04 | Asm Ip Holding B.V. | Doped semiconductor films and processing |
US9012278B2 (en) | 2013-10-03 | 2015-04-21 | Asm Ip Holding B.V. | Method of making a wire-based semiconductor device |
CN105826200B (zh) * | 2015-01-09 | 2018-11-16 | 中芯国际集成电路制造(上海)有限公司 | 晶体管及其形成方法 |
US9627395B2 (en) | 2015-02-11 | 2017-04-18 | Sandisk Technologies Llc | Enhanced channel mobility three-dimensional memory structure and method of making thereof |
US9478495B1 (en) | 2015-10-26 | 2016-10-25 | Sandisk Technologies Llc | Three dimensional memory device containing aluminum source contact via structure and method of making thereof |
EP3185299B1 (de) | 2015-12-21 | 2023-05-24 | IMEC vzw | Selbstausgerichtete nanostrukturen für halbleiterbauelement |
US9882047B2 (en) | 2016-02-01 | 2018-01-30 | International Business Machines Corporation | Self-aligned replacement metal gate spacerless vertical field effect transistor |
US9711618B1 (en) | 2016-03-31 | 2017-07-18 | International Business Machines Corporation | Fabrication of vertical field effect transistor structure with controlled gate length |
US10032906B2 (en) * | 2016-04-29 | 2018-07-24 | Samsung Electronics Co., Ltd. | Vertical field effect transistor and method of fabricating the same |
US10199480B2 (en) * | 2016-09-29 | 2019-02-05 | Globalfoundries Inc. | Controlling self-aligned gate length in vertical transistor replacement gate flow |
US10734245B2 (en) * | 2018-10-19 | 2020-08-04 | International Business Machines Corporation | Highly selective dry etch process for vertical FET STI recess |
US11075280B2 (en) | 2019-04-17 | 2021-07-27 | International Business Machines Corporation | Self-aligned gate and junction for VTFET |
CN111244161B (zh) * | 2020-01-21 | 2023-08-11 | 中国科学院微电子研究所 | C形沟道部半导体装置及包括其的电子设备 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2103879B (en) * | 1981-08-19 | 1985-04-11 | Secr Defence | Method for producing a vertical channel transistor |
JPS60128654A (ja) * | 1983-12-16 | 1985-07-09 | Hitachi Ltd | 半導体集積回路 |
US5106778A (en) * | 1988-02-02 | 1992-04-21 | Massachusetts Institute Of Technology | Vertical transistor device fabricated with semiconductor regrowth |
JP2804539B2 (ja) * | 1989-09-28 | 1998-09-30 | 沖電気工業株式会社 | 半導体装置およびその製造方法 |
US5140388A (en) | 1991-03-22 | 1992-08-18 | Hewlett-Packard Company | Vertical metal-oxide semiconductor devices |
US5612563A (en) | 1992-03-02 | 1997-03-18 | Motorola Inc. | Vertically stacked vertical transistors used to form vertical logic gate structures |
US5308782A (en) * | 1992-03-02 | 1994-05-03 | Motorola | Semiconductor memory device and method of formation |
US5208172A (en) * | 1992-03-02 | 1993-05-04 | Motorola, Inc. | Method for forming a raised vertical transistor |
US5340754A (en) * | 1992-09-02 | 1994-08-23 | Motorla, Inc. | Method for forming a transistor having a dynamic connection between a substrate and a channel region |
US5324673A (en) | 1992-11-19 | 1994-06-28 | Motorola, Inc. | Method of formation of vertical transistor |
KR0165398B1 (ko) * | 1995-05-26 | 1998-12-15 | 윤종용 | 버티칼 트랜지스터의 제조방법 |
US6020257A (en) | 1995-06-07 | 2000-02-01 | Elm Technology Corporation | Membrane dielectric isolation IC fabrication |
TW312852B (en) * | 1996-06-08 | 1997-08-11 | United Microelectronics Corp | Manufacturing method of flash memory |
JP3371708B2 (ja) * | 1996-08-22 | 2003-01-27 | ソニー株式会社 | 縦型電界効果トランジスタの製造方法 |
JPH10112543A (ja) * | 1996-10-04 | 1998-04-28 | Oki Electric Ind Co Ltd | 半導体素子および半導体素子の製造方法 |
TW425718B (en) * | 1997-06-11 | 2001-03-11 | Siemens Ag | Vertical transistor |
-
1999
- 1999-06-18 US US09/335,707 patent/US6197641B1/en not_active Expired - Lifetime
-
2000
- 2000-06-06 DE DE60001600T patent/DE60001600T2/de not_active Expired - Lifetime
- 2000-06-06 EP EP00304797A patent/EP1063694B1/de not_active Expired - Lifetime
- 2000-06-16 KR KR10-2000-0033163A patent/KR100392278B1/ko not_active IP Right Cessation
- 2000-06-19 JP JP2000183545A patent/JP2001057427A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
KR20010029807A (ko) | 2001-04-16 |
EP1063694A1 (de) | 2000-12-27 |
US6197641B1 (en) | 2001-03-06 |
KR100392278B1 (ko) | 2003-07-22 |
EP1063694B1 (de) | 2003-03-12 |
JP2001057427A (ja) | 2001-02-27 |
DE60001600T2 (de) | 2003-11-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |