DE60039461D1 - Phasenschieber mit verringerter linearer abhängigkeit - Google Patents

Phasenschieber mit verringerter linearer abhängigkeit

Info

Publication number
DE60039461D1
DE60039461D1 DE60039461T DE60039461T DE60039461D1 DE 60039461 D1 DE60039461 D1 DE 60039461D1 DE 60039461 T DE60039461 T DE 60039461T DE 60039461 T DE60039461 T DE 60039461T DE 60039461 D1 DE60039461 D1 DE 60039461D1
Authority
DE
Germany
Prior art keywords
lfsrs
reduced linear
circuits
linear dependence
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60039461T
Other languages
English (en)
Inventor
Janusz Rajski
Jerzy Tyszer
Nagesh Tamarapalli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mentor Graphics Corp
Original Assignee
Mentor Graphics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mentor Graphics Corp filed Critical Mentor Graphics Corp
Application granted granted Critical
Publication of DE60039461D1 publication Critical patent/DE60039461D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/31813—Test pattern generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3183—Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318385—Random or pseudo-random test pattern
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318544—Scanning methods, algorithms and patterns
    • G01R31/318547—Data generators or compressors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318594—Timing aspects
DE60039461T 1999-11-23 2000-11-16 Phasenschieber mit verringerter linearer abhängigkeit Expired - Lifetime DE60039461D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16744899P 1999-11-23 1999-11-23
US09/713,662 US6874109B1 (en) 1999-11-23 2000-11-15 Phase shifter with reduced linear dependency
PCT/US2000/031827 WO2001038891A1 (en) 1999-11-23 2000-11-16 Phase shifter with reduced linear dependency

Publications (1)

Publication Number Publication Date
DE60039461D1 true DE60039461D1 (de) 2008-08-21

Family

ID=26863187

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60039461T Expired - Lifetime DE60039461D1 (de) 1999-11-23 2000-11-16 Phasenschieber mit verringerter linearer abhängigkeit

Country Status (7)

Country Link
US (5) US6874109B1 (de)
EP (1) EP1257837B1 (de)
JP (1) JP3699397B2 (de)
AT (1) ATE400821T1 (de)
DE (1) DE60039461D1 (de)
HK (1) HK1049208A1 (de)
WO (1) WO2001038891A1 (de)

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US9134370B2 (en) 1999-11-23 2015-09-15 Mentor Graphics Corporation Continuous application and decompression of test patterns and selective compaction of test responses
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US6557129B1 (en) * 1999-11-23 2003-04-29 Janusz Rajski Method and apparatus for selectively compacting test responses
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US8533547B2 (en) * 1999-11-23 2013-09-10 Mentor Graphics Corporation Continuous application and decompression of test patterns and selective compaction of test responses
US6327687B1 (en) * 1999-11-23 2001-12-04 Janusz Rajski Test pattern compression for an integrated circuit test environment
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US7437640B2 (en) * 2003-02-13 2008-10-14 Janusz Rajski Fault diagnosis of compressed test responses having one or more unknown states
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US10345369B2 (en) * 2012-10-02 2019-07-09 Synopsys, Inc. Augmented power-aware decompressor
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US11422188B2 (en) 2018-03-22 2022-08-23 Siemens Industry Software Inc Isometric control data generation for test compression
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US20050015688A1 (en) 2005-01-20
US20070300110A1 (en) 2007-12-27
US6874109B1 (en) 2005-03-29
US7653851B2 (en) 2010-01-26
US7263641B2 (en) 2007-08-28
HK1049208A1 (zh) 2003-05-02
EP1257837B1 (de) 2008-07-09
US20090187800A1 (en) 2009-07-23
WO2001038891A1 (en) 2001-05-31
EP1257837A1 (de) 2002-11-20
US7523372B2 (en) 2009-04-21
US20100083063A1 (en) 2010-04-01
ATE400821T1 (de) 2008-07-15
JP3699397B2 (ja) 2005-09-28
EP1257837A4 (de) 2005-01-12

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