DE60131811D1 - Heteroübergangsbipolartransistor - Google Patents

Heteroübergangsbipolartransistor

Info

Publication number
DE60131811D1
DE60131811D1 DE60131811T DE60131811T DE60131811D1 DE 60131811 D1 DE60131811 D1 DE 60131811D1 DE 60131811 T DE60131811 T DE 60131811T DE 60131811 T DE60131811 T DE 60131811T DE 60131811 D1 DE60131811 D1 DE 60131811D1
Authority
DE
Germany
Prior art keywords
bipolar transistor
heterojunction bipolar
heterojunction
transistor
bipolar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60131811T
Other languages
English (en)
Other versions
DE60131811T2 (de
Inventor
Kenji Toyoda
Koichiro Yuki
Takeshi Takagi
Teruhito Ohnishi
Minoru Kubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE60131811D1 publication Critical patent/DE60131811D1/de
Publication of DE60131811T2 publication Critical patent/DE60131811T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/737—Hetero-junction transistors
    • H01L29/7371—Vertical transistors
    • H01L29/7378—Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
DE60131811T 2000-09-11 2001-09-11 Heteroübergangsbipolartransistor Expired - Lifetime DE60131811T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000274877 2000-09-11
JP2000274877 2000-09-11

Publications (2)

Publication Number Publication Date
DE60131811D1 true DE60131811D1 (de) 2008-01-24
DE60131811T2 DE60131811T2 (de) 2008-04-03

Family

ID=18760575

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60131811T Expired - Lifetime DE60131811T2 (de) 2000-09-11 2001-09-11 Heteroübergangsbipolartransistor

Country Status (5)

Country Link
US (3) US20020163013A1 (de)
EP (1) EP1187218B1 (de)
KR (1) KR100725689B1 (de)
CN (1) CN1205674C (de)
DE (1) DE60131811T2 (de)

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* Cited by examiner, † Cited by third party
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US6639256B2 (en) 2002-02-04 2003-10-28 Newport Fab, Llc Structure for eliminating collector-base band gap discontinuity in an HBT
US6759674B2 (en) * 2002-02-04 2004-07-06 Newport Fab, Llc Band gap compensated HBT
JP3914064B2 (ja) * 2002-02-28 2007-05-16 富士通株式会社 混晶膜の成長方法及び装置
JP4391069B2 (ja) * 2002-04-30 2009-12-24 富士通マイクロエレクトロニクス株式会社 ヘテロバイポーラトランジスタおよびその製造方法
JP3643100B2 (ja) * 2002-10-04 2005-04-27 松下電器産業株式会社 半導体装置
JP3507830B1 (ja) * 2002-10-04 2004-03-15 松下電器産業株式会社 半導体装置
WO2004064161A1 (ja) 2003-01-14 2004-07-29 Matsushita Electric Industrial Co., Ltd. 半導体集積回路の製造方法および半導体集積回路
US7517768B2 (en) * 2003-03-31 2009-04-14 Intel Corporation Method for fabricating a heterojunction bipolar transistor
JP4714422B2 (ja) * 2003-04-05 2011-06-29 ローム・アンド・ハース・エレクトロニック・マテリアルズ，エル．エル．シー． ゲルマニウムを含有するフィルムを堆積させる方法、及び蒸気送達装置
US7166528B2 (en) 2003-10-10 2007-01-23 Applied Materials, Inc. Methods of selective deposition of heavily doped epitaxial SiGe
GB0326993D0 (en) 2003-11-20 2003-12-24 Qinetiq Ltd Strained semiconductor devices
US7317215B2 (en) * 2004-09-21 2008-01-08 International Business Machines Corporation SiGe heterojunction bipolar transistor (HBT)
US7482673B2 (en) * 2004-09-29 2009-01-27 International Business Machines Corporation Structure and method for bipolar transistor having non-uniform collector-base junction
US7015091B1 (en) * 2004-11-18 2006-03-21 Promos Technologies, Inc. Integration of silicon carbide into DRAM cell to improve retention characteristics
US7312128B2 (en) * 2004-12-01 2007-12-25 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US7682940B2 (en) 2004-12-01 2010-03-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
US20060151808A1 (en) * 2005-01-12 2006-07-13 Chien-Hao Chen MOSFET device with localized stressor
US7262484B2 (en) * 2005-05-09 2007-08-28 International Business Machines Corporation Structure and method for performance improvement in vertical bipolar transistors
US7439558B2 (en) 2005-11-04 2008-10-21 Atmel Corporation Method and system for controlled oxygen incorporation in compound semiconductor films for device performance enhancement
US7651919B2 (en) * 2005-11-04 2010-01-26 Atmel Corporation Bandgap and recombination engineered emitter layers for SiGe HBT performance optimization
US20070102729A1 (en) * 2005-11-04 2007-05-10 Enicks Darwin G Method and system for providing a heterojunction bipolar transistor having SiGe extensions
US7300849B2 (en) * 2005-11-04 2007-11-27 Atmel Corporation Bandgap engineered mono-crystalline silicon cap layers for SiGe HBT performance enhancement
US7892915B1 (en) * 2006-03-02 2011-02-22 National Semiconductor Corporation High performance SiGe:C HBT with phosphorous atomic layer doping
US7674337B2 (en) 2006-04-07 2010-03-09 Applied Materials, Inc. Gas manifolds for use during epitaxial film formation
DE112007001814T5 (de) 2006-07-31 2009-06-04 Applied Materials, Inc., Santa Clara Verfahren zum Bilden kohlenstoffhaltiger Siliziumepitaxieschichten

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4771326A (en) * 1986-07-09 1988-09-13 Texas Instruments Incorporated Composition double heterojunction transistor
US4771013A (en) * 1986-08-01 1988-09-13 Texas Instruments Incorporated Process of making a double heterojunction 3-D I2 L bipolar transistor with a Si/Ge superlattice
JPH0656853B2 (ja) 1987-06-24 1994-07-27 日本電気株式会社 ヘテロ接合バイポ−ラトランジスタ
JP2569058B2 (ja) * 1987-07-10 1997-01-08 株式会社日立製作所 半導体装置
JP2576573B2 (ja) 1988-03-10 1997-01-29 富士通株式会社 バイポーラトランジスタ
JPH02309644A (ja) 1989-05-24 1990-12-25 Fujitsu Ltd バイポーラ・トランジスタ
EP0445475B1 (de) * 1990-02-20 1998-08-26 Kabushiki Kaisha Toshiba Bipolartransistor mit Heteroübergang
US5150185A (en) * 1990-04-18 1992-09-22 Fujitsu Limited Semiconductor device
JPH04106980A (ja) 1990-08-24 1992-04-08 Fujitsu Ltd 半導体装置及びその製造方法
US5241214A (en) * 1991-04-29 1993-08-31 Massachusetts Institute Of Technology Oxides and nitrides of metastabale group iv alloys and nitrides of group iv elements and semiconductor devices formed thereof
JPH05102177A (ja) * 1991-10-02 1993-04-23 Hitachi Ltd 半導体集積回路装置及びこれを用いた電子計算機
US5352912A (en) 1991-11-13 1994-10-04 International Business Machines Corporation Graded bandgap single-crystal emitter heterojunction bipolar transistor
JPH05182980A (ja) 1992-01-07 1993-07-23 Toshiba Corp ヘテロ接合バイポーラトランジスタ
US5426316A (en) * 1992-12-21 1995-06-20 International Business Machines Corporation Triple heterojunction bipolar transistor
JP2531355B2 (ja) * 1993-06-30 1996-09-04 日本電気株式会社 バイポ―ラトランジスタおよびその製造方法
US6404003B1 (en) * 1999-07-28 2002-06-11 Symetrix Corporation Thin film capacitors on silicon germanium substrate
US5834800A (en) * 1995-04-10 1998-11-10 Lucent Technologies Inc. Heterojunction bipolar transistor having mono crystalline SiGe intrinsic base and polycrystalline SiGe and Si extrinsic base regions
DE19533313A1 (de) * 1995-09-08 1997-03-13 Max Planck Gesellschaft Halbleiterstruktur für einen Transistor
US5721438A (en) * 1996-01-31 1998-02-24 Motorola, Inc. Heterojunction semiconductor device and method of manufacture
JPH09260397A (ja) 1996-03-25 1997-10-03 Hitachi Ltd 半導体回路およびバイポーラトランジスタ
US6399970B2 (en) * 1996-09-17 2002-06-04 Matsushita Electric Industrial Co., Ltd. FET having a Si/SiGeC heterojunction channel
US6190984B1 (en) * 1996-11-27 2001-02-20 Electronics And Telecommunications Research Institute Method for fabricating of super self-aligned bipolar transistor
DE19755979A1 (de) 1996-12-09 1999-06-10 Inst Halbleiterphysik Gmbh Silizium-Germanium-Heterobipolartransistor
US6689211B1 (en) * 1999-04-09 2004-02-10 Massachusetts Institute Of Technology Etch stop layer system
JP2000031162A (ja) 1998-07-16 2000-01-28 Matsushita Electric Ind Co Ltd ヘテロ接合バイポーラトランジスタ
US6087683A (en) * 1998-07-31 2000-07-11 Lucent Technologies Silicon germanium heterostructure bipolar transistor with indium doped base
EP1065728B1 (de) * 1999-06-22 2009-04-22 Panasonic Corporation Heteroübergangsbipolartransistoren und entsprechende Herstellungsverfahren
WO2001004960A1 (fr) * 1999-07-07 2001-01-18 Matsushita Electric Industrial Co., Ltd. Dispositif semi-conducteur et procede de fabrication correspondant
JP2001086160A (ja) 1999-09-14 2001-03-30 Aiwa Co Ltd データ通信方法及び通信端末装置

Also Published As

Publication number Publication date
US20030213977A1 (en) 2003-11-20
KR20020020864A (ko) 2002-03-16
KR100725689B1 (ko) 2007-06-07
US6759697B2 (en) 2004-07-06
EP1187218B1 (de) 2007-12-12
DE60131811T2 (de) 2008-04-03
CN1205674C (zh) 2005-06-08
EP1187218A3 (de) 2003-02-12
US20020163013A1 (en) 2002-11-07
US20040232441A1 (en) 2004-11-25
CN1344033A (zh) 2002-04-10
US7135721B2 (en) 2006-11-14
EP1187218A2 (de) 2002-03-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP