DE60132660D1 - Verteilte kapazität - Google Patents

Verteilte kapazität

Info

Publication number
DE60132660D1
DE60132660D1 DE60132660T DE60132660T DE60132660D1 DE 60132660 D1 DE60132660 D1 DE 60132660D1 DE 60132660 T DE60132660 T DE 60132660T DE 60132660 T DE60132660 T DE 60132660T DE 60132660 D1 DE60132660 D1 DE 60132660D1
Authority
DE
Germany
Prior art keywords
layers
electrode
integrated circuit
opening
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60132660T
Other languages
English (en)
Other versions
DE60132660T2 (de
Inventor
Michael Man-Kuen Watt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gennum Corp
Original Assignee
Gennum Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gennum Corp filed Critical Gennum Corp
Application granted granted Critical
Publication of DE60132660D1 publication Critical patent/DE60132660D1/de
Publication of DE60132660T2 publication Critical patent/DE60132660T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0805—Capacitors only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
DE60132660T 2000-04-06 2001-04-06 Verteilte kapazität Expired - Fee Related DE60132660T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US544550 2000-04-06
US09/544,550 US6411494B1 (en) 2000-04-06 2000-04-06 Distributed capacitor
PCT/CA2001/000484 WO2001078093A2 (en) 2000-04-06 2001-04-06 Distributed capacitor

Publications (2)

Publication Number Publication Date
DE60132660D1 true DE60132660D1 (de) 2008-03-20
DE60132660T2 DE60132660T2 (de) 2009-01-08

Family

ID=24172631

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60132660T Expired - Fee Related DE60132660T2 (de) 2000-04-06 2001-04-06 Verteilte kapazität

Country Status (7)

Country Link
US (1) US6411494B1 (de)
EP (1) EP1273017B1 (de)
AT (1) ATE385341T1 (de)
AU (1) AU2001252058A1 (de)
CA (1) CA2443551A1 (de)
DE (1) DE60132660T2 (de)
WO (1) WO2001078093A2 (de)

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US6873185B2 (en) * 2002-06-19 2005-03-29 Viasic, Inc. Logic array devices having complex macro-cell architecture and methods facilitating use of same
DE10260352A1 (de) 2002-12-20 2004-07-15 Infineon Technologies Ag Verfahren zum Herstellen einer Kondensatoranordnung und Kondensatoranordnung
JP2006522473A (ja) * 2003-04-07 2006-09-28 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ 集積分布減結合コンデンサを有する電子パッケージング構造
US8569142B2 (en) * 2003-11-28 2013-10-29 Blackberry Limited Multi-level thin film capacitor on a ceramic substrate and method of manufacturing the same
US7335966B2 (en) * 2004-02-26 2008-02-26 Triad Semiconductor, Inc. Configurable integrated circuit capacitor array using via mask layers
US7449371B2 (en) * 2004-04-02 2008-11-11 Triad Semiconductor VIA configurable architecture for customization of analog circuitry in a semiconductor device
US7334208B1 (en) 2004-11-09 2008-02-19 Viasic, Inc. Customization of structured ASIC devices using pre-process extraction of routing information
JP4928748B2 (ja) * 2005-06-27 2012-05-09 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8201128B2 (en) * 2006-06-16 2012-06-12 Cadence Design Systems, Inc. Method and apparatus for approximating diagonal lines in placement
US7813107B1 (en) 2007-03-15 2010-10-12 Greatbatch Ltd. Wet tantalum capacitor with multiple anode connections
JP2008277546A (ja) * 2007-04-27 2008-11-13 Rohm Co Ltd 半導体装置
US7692309B2 (en) * 2007-09-06 2010-04-06 Viasic, Inc. Configuring structured ASIC fabric using two non-adjacent via layers
US20090230446A1 (en) 2008-03-17 2009-09-17 Technology Alliance Group, Inc. Semiconductor device and bypass capacitor module
US8680649B2 (en) * 2008-08-22 2014-03-25 Stmicroelectronics (Tours) Sas Multi-layer film capacitor with tapered film sidewalls
JP5267268B2 (ja) * 2009-03-26 2013-08-21 Ｔｄｋ株式会社 薄膜コンデンサ及びその製造方法
JP5407775B2 (ja) * 2009-03-31 2014-02-05 Ｔｄｋ株式会社 薄膜コンデンサの製造方法及び薄膜コンデンサ
DE102009059873A1 (de) 2009-12-21 2011-06-22 Epcos Ag, 81669 Varaktor und Verfahren zur Herstellung eines Varaktors
WO2014070763A1 (en) 2012-10-30 2014-05-08 Anayas360.Com, Llc Compact and low-power millimeter-wave integrated vco-up/down- converter with gain-boosting
WO2014089521A1 (en) * 2012-12-07 2014-06-12 Anayas360.Com, Llc Highly integrated millimeter-wave soc layout techniques
US9099861B2 (en) * 2013-05-23 2015-08-04 Inpaq Technology Co., Ltd. Over-voltage protection device and method for preparing the same
JP2015133392A (ja) 2014-01-10 2015-07-23 富士通セミコンダクター株式会社 半導体装置及びその製造方法
KR102183713B1 (ko) 2014-02-13 2020-11-26 삼성전자주식회사 3차원 반도체 장치의 계단형 연결 구조 및 이를 형성하는 방법
FR3022072B1 (fr) * 2014-06-10 2017-08-25 Commissariat Energie Atomique Dispositif electrique multicouches
US20160181233A1 (en) * 2014-12-23 2016-06-23 Qualcomm Incorporated Metal-insulator-metal (mim) capacitors arranged in a pattern to reduce inductance, and related methods
JP2016162904A (ja) * 2015-03-03 2016-09-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9998100B2 (en) 2015-08-28 2018-06-12 Ampere Computing Llc Package programmable decoupling capacitor array
US9767962B2 (en) * 2016-01-22 2017-09-19 Micron Technology, Inc. Apparatuses, multi-chip modules and capacitive chips
JP6805702B2 (ja) 2016-10-11 2020-12-23 Tdk株式会社 薄膜コンデンサ
JP2018063989A (ja) 2016-10-11 2018-04-19 Tdk株式会社 薄膜キャパシタ
JP6737118B2 (ja) 2016-10-11 2020-08-05 Tdk株式会社 薄膜コンデンサ
US10886219B2 (en) * 2017-01-18 2021-01-05 Tdk Corporation Electronic component mounting package
US20210020587A1 (en) * 2019-06-11 2021-01-21 Skyworks Solutions, Inc. Moisture barrier for metal insulator metal capacitors and integrated circuit having the same
CN112652619B (zh) * 2020-12-22 2022-08-09 长江存储科技有限责任公司 垫片及其制造方法、封装结构及其制造方法
US11754444B2 (en) 2021-03-19 2023-09-12 Rockwell Collins, Inc. Distributed integrate and dump circuit
CN113517401B (zh) * 2021-09-13 2021-12-17 广州粤芯半导体技术有限公司 金属电容结构及其制备方法
US11869725B2 (en) * 2021-11-30 2024-01-09 Texas Instruments Incorporated Multi-stacked capacitor

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Also Published As

Publication number Publication date
DE60132660T2 (de) 2009-01-08
WO2001078093A2 (en) 2001-10-18
CA2443551A1 (en) 2001-10-18
WO2001078093A3 (en) 2002-03-28
EP1273017A2 (de) 2003-01-08
AU2001252058A1 (en) 2001-10-23
US6411494B1 (en) 2002-06-25
EP1273017B1 (de) 2008-01-30
ATE385341T1 (de) 2008-02-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee