DE60132872D1 - Anordnung und Verfahren für eine Schnittstelleneinheit um Daten zwischen einem Hauptprozessor und einem digitalen Signalprozessor im asynchronen Übertragungsmodus zu übertragen - Google Patents

Anordnung und Verfahren für eine Schnittstelleneinheit um Daten zwischen einem Hauptprozessor und einem digitalen Signalprozessor im asynchronen Übertragungsmodus zu übertragen

Info

Publication number
DE60132872D1
DE60132872D1 DE60132872T DE60132872T DE60132872D1 DE 60132872 D1 DE60132872 D1 DE 60132872D1 DE 60132872 T DE60132872 T DE 60132872T DE 60132872 T DE60132872 T DE 60132872T DE 60132872 D1 DE60132872 D1 DE 60132872D1
Authority
DE
Germany
Prior art keywords
arrangement
digital signal
interface unit
signal processor
transfer data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60132872T
Other languages
English (en)
Other versions
DE60132872T2 (de
Inventor
Shaku Anjanaiah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE60132872D1 publication Critical patent/DE60132872D1/de
Publication of DE60132872T2 publication Critical patent/DE60132872T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
DE60132872T 2000-10-02 2001-09-28 Anordnung und Verfahren für eine Schnittstelleneinheit um Daten zwischen einem Hauptprozessor und einem digitalen Signalprozessor im asynchronen Übertragungsmodus zu übertragen Expired - Lifetime DE60132872T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US23723700P 2000-10-02 2000-10-02
US237237 2000-10-02

Publications (2)

Publication Number Publication Date
DE60132872D1 true DE60132872D1 (de) 2008-04-03
DE60132872T2 DE60132872T2 (de) 2009-02-12

Family

ID=22892884

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60132872T Expired - Lifetime DE60132872T2 (de) 2000-10-02 2001-09-28 Anordnung und Verfahren für eine Schnittstelleneinheit um Daten zwischen einem Hauptprozessor und einem digitalen Signalprozessor im asynchronen Übertragungsmodus zu übertragen

Country Status (4)

Country Link
US (4) US20020136220A1 (de)
EP (1) EP1202182B1 (de)
JP (1) JP4427214B2 (de)
DE (1) DE60132872T2 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7031992B2 (en) * 2000-09-08 2006-04-18 Quartics, Inc. Hardware function generator support in a DSP
US20020136220A1 (en) * 2000-10-02 2002-09-26 Shakuntala Anjanaiah Apparatus and method for an interface unit for data transfer between data processing units in the asynchronous transfer mode and in the I/O mode
US7342927B1 (en) * 2001-03-09 2008-03-11 Brooktree Broadband Holding, Inc. Systems and methods for transferring various data types across an ATM network
US6961340B2 (en) * 2001-04-06 2005-11-01 Texas Instruments Incorporated AAL2 receiver for filtering signaling/management packets in an ATM system
US6990108B2 (en) * 2001-04-06 2006-01-24 Texas Instruments Incorporated ATM system architecture for the convergence of data, voice and video
US6965558B1 (en) * 2001-08-23 2005-11-15 Cisco Technology, Inc. Method and system for protecting a network interface
US20030112758A1 (en) * 2001-12-03 2003-06-19 Pang Jon Laurent Methods and systems for managing variable delays in packet transmission
US20030105799A1 (en) * 2001-12-03 2003-06-05 Avaz Networks, Inc. Distributed processing architecture with scalable processing layers
KR100487129B1 (ko) * 2003-01-21 2005-05-03 삼성전자주식회사 유토피아 인터페이스의 선입선출부간 1 바이트 단위로 셀전송을 제어하는 방법
JP4806418B2 (ja) * 2005-01-10 2011-11-02 クォーティックス インク ビジュアルメディアの統合処理のための統合アーキテクチャ
US8547993B1 (en) * 2006-08-10 2013-10-01 Nvidia Corporation Asynchronous interface for communicating between clock domains
JP2008103904A (ja) * 2006-10-18 2008-05-01 Nec Saitama Ltd Ａｔｍセル通信システム、ａｔｍレイヤデバイス及びａｔｍセル通信方法
US7899983B2 (en) 2007-08-31 2011-03-01 International Business Machines Corporation Buffered memory module supporting double the memory device data width in the same physical space as a conventional memory module
US7818497B2 (en) * 2007-08-31 2010-10-19 International Business Machines Corporation Buffered memory module supporting two independent memory channels
US7840748B2 (en) * 2007-08-31 2010-11-23 International Business Machines Corporation Buffered memory module with multiple memory device data interface ports supporting double the memory capacity
US8082482B2 (en) * 2007-08-31 2011-12-20 International Business Machines Corporation System for performing error correction operations in a memory hub device of a memory module
US8086936B2 (en) * 2007-08-31 2011-12-27 International Business Machines Corporation Performing error correction at a memory device level that is transparent to a memory channel
US7865674B2 (en) * 2007-08-31 2011-01-04 International Business Machines Corporation System for enhancing the memory bandwidth available through a memory module
US7861014B2 (en) * 2007-08-31 2010-12-28 International Business Machines Corporation System for supporting partial cache line read operations to a memory module to reduce read data traffic on a memory channel
US7584308B2 (en) * 2007-08-31 2009-09-01 International Business Machines Corporation System for supporting partial cache line write operations to a memory module to reduce write data traffic on a memory channel
US7558887B2 (en) 2007-09-05 2009-07-07 International Business Machines Corporation Method for supporting partial cache line read and write operations to a memory module to reduce read and write data traffic on a memory channel
US8019919B2 (en) * 2007-09-05 2011-09-13 International Business Machines Corporation Method for enhancing the memory bandwidth available through a memory module
US7925825B2 (en) * 2008-01-24 2011-04-12 International Business Machines Corporation System to support a full asynchronous interface within a memory hub device
US7930470B2 (en) * 2008-01-24 2011-04-19 International Business Machines Corporation System to enable a memory hub device to manage thermal conditions at a memory device level transparent to a memory controller
US7770077B2 (en) * 2008-01-24 2010-08-03 International Business Machines Corporation Using cache that is embedded in a memory hub to replace failed memory cells in a memory subsystem
US7925824B2 (en) * 2008-01-24 2011-04-12 International Business Machines Corporation System to reduce latency by running a memory channel frequency fully asynchronous from a memory device frequency
US7930469B2 (en) 2008-01-24 2011-04-19 International Business Machines Corporation System to provide memory system power reduction without reducing overall memory system performance
US7925826B2 (en) * 2008-01-24 2011-04-12 International Business Machines Corporation System to increase the overall bandwidth of a memory channel by allowing the memory channel to operate at a frequency independent from a memory device frequency
US8140936B2 (en) * 2008-01-24 2012-03-20 International Business Machines Corporation System for a combined error correction code and cyclic redundancy check code for a memory channel
CN102708078B (zh) * 2012-05-28 2015-04-01 安徽状元郎电子科技有限公司 一种实现学习机lcd数据总线与摄像头数据总线复用的方法
US10866696B2 (en) 2018-10-04 2020-12-15 The Toronto-Dominion Bank Automated device for data transfer
US10984418B2 (en) 2018-10-04 2021-04-20 The Toronto-Dominion Bank Automated device for data transfer
US11069201B2 (en) 2018-10-04 2021-07-20 The Toronto-Dominion Bank Automated device for exchange of data
US10996838B2 (en) 2019-04-24 2021-05-04 The Toronto-Dominion Bank Automated teller device having accessibility configurations
US20230398960A1 (en) * 2022-06-09 2023-12-14 Toyota Motor North America, Inc. Methods and systems for theft deterrent of vehicles

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805927A (en) * 1994-01-28 1998-09-08 Apple Computer, Inc. Direct memory access channel architecture and method for reception of network information
FI97095C (fi) * 1994-10-31 1996-10-10 Nokia Mobile Phones Ltd TDMA-signaalien kehysajastuksen ohjaus
US5625625A (en) * 1995-07-07 1997-04-29 Sun Microsystems, Inc. Method and apparatus for partitioning data load and unload functions within an interface system for use with an asynchronous transfer mode system
US5600650A (en) * 1995-07-07 1997-02-04 Sun Microsystems, Inc. Method and apparatus for synthesizing clock signals for use with an asynchronous transfer mode system having selectable data transmission rates
US5845153A (en) * 1995-07-07 1998-12-01 Integrated Device Technology, Inc. Memory interface for asynchronous transfer mode segmentation and reassembly circuit
US5796735A (en) * 1995-08-28 1998-08-18 Integrated Device Technology, Inc. System and method for transmission rate control in a segmentation and reassembly (SAR) circuit under ATM protocol
US5982772A (en) * 1995-11-06 1999-11-09 Sun Microsystems, Inc. Cell interface block partitioning for segmentation and re-assembly engine
US5835925A (en) * 1996-03-13 1998-11-10 Cray Research, Inc. Using external registers to extend memory reference capabilities of a microprocessor
US5870628A (en) * 1996-06-11 1999-02-09 International Business Machines Corporation Adaptor for receiving and processing asynchronous transfer mode cells within a computer network
US5983332A (en) * 1996-07-01 1999-11-09 Sun Microsystems, Inc. Asynchronous transfer mode (ATM) segmentation and reassembly unit virtual address translation unit architecture
KR0185868B1 (ko) * 1996-08-31 1999-05-15 대우전자주식회사 유토피아 접면에서의 분할 및 조립 계층과 물리계층간의 속도정합방법
US5941952A (en) * 1996-09-12 1999-08-24 Cabletron Systems, Inc. Apparatus and method for transferring data from a transmit buffer memory at a particular rate
AU5791098A (en) * 1996-11-27 1998-06-22 Alcatel Usa Sourcing, L.P. Optical network unit for communicating telephony and video information
US5943479A (en) * 1997-01-02 1999-08-24 Digital Equipment Corporation Method for reducing the rate of interrupts in a high speed I/O controller
US6170048B1 (en) * 1997-03-24 2001-01-02 Texas Instruments Incorporated PC circuits, systems and methods
US5938728A (en) * 1997-10-30 1999-08-17 Advanced Micro Devices, Inc. Apparatus and method for selectively controlling clocking and resetting of a network interface
KR100256677B1 (ko) * 1997-12-24 2000-05-15 이계철 공유 매체 액세스가 가능한 비동기 전달 모드 호스트 어뎁팅 장치
US5968149A (en) * 1998-01-07 1999-10-19 International Business Machines Corporation Tandem operation of input/output data compression modules
US6256308B1 (en) * 1998-01-20 2001-07-03 Telefonaktiebolaget Lm Ericsson Multi-service circuit for telecommunications
US6122680A (en) * 1998-06-18 2000-09-19 Lsi Logic Corporation Multiple channel data communication buffer with separate single port transmit and receive memories having a unique channel for each communication port and with fixed arbitration
US6356557B1 (en) * 1998-10-14 2002-03-12 Ahead Communications Systems, Inc. Hot insertable UTOPIA interface with automatic protection switching for backplane applications
US6700872B1 (en) * 1998-12-11 2004-03-02 Cisco Technology, Inc. Method and system for testing a utopia network element
US6449655B1 (en) * 1999-01-08 2002-09-10 Cisco Technology, Inc. Method and apparatus for communication between network devices operating at different frequencies
DE19911830A1 (de) * 1999-03-17 2000-09-21 Bosch Gmbh Robert Verfahren zum Verwalten des Zugriffs auf einen Bus und Bussystem
US6732206B1 (en) * 1999-08-05 2004-05-04 Accelerated Networks Expanded addressing for traffic queues and prioritization
US20020031141A1 (en) * 2000-05-25 2002-03-14 Mcwilliams Patrick Method of detecting back pressure in a communication system using an utopia-LVDS bridge
US20020136220A1 (en) * 2000-10-02 2002-09-26 Shakuntala Anjanaiah Apparatus and method for an interface unit for data transfer between data processing units in the asynchronous transfer mode and in the I/O mode
US6862294B1 (en) * 2000-12-27 2005-03-01 Cisco Technology, Inc. Method and apparatus for overcoming large transport delays between master and slave utopia devices
KR100452592B1 (ko) * 2001-07-30 2004-10-14 엘지전자 주식회사 에이티엠 교환기 및 이에 내장된 에이티엠계층/물리계층다중 인터페이스 모듈
US7002979B1 (en) * 2001-08-10 2006-02-21 Utstarcom, Inc. Voice data packet processing system

Also Published As

Publication number Publication date
JP2002204253A (ja) 2002-07-19
US7570646B2 (en) 2009-08-04
DE60132872T2 (de) 2009-02-12
US20020136220A1 (en) 2002-09-26
US20040109468A1 (en) 2004-06-10
JP4427214B2 (ja) 2010-03-03
EP1202182A1 (de) 2002-05-02
US20030076839A1 (en) 2003-04-24
EP1202182B1 (de) 2008-02-20
US20030046457A1 (en) 2003-03-06

Similar Documents

Publication Publication Date Title
DE60132872D1 (de) Anordnung und Verfahren für eine Schnittstelleneinheit um Daten zwischen einem Hauptprozessor und einem digitalen Signalprozessor im asynchronen Übertragungsmodus zu übertragen
GB2369907B (en) Method and system for computer aided manufacturing measurement analysis
GB2345997B (en) A computer system for analysing data in connection with resolving a dispute
DE69716945D1 (de) Verfahren und gerät zur abspeicherung und auslesung von durch eine netzwerkschnittstelle-einheit versammelte leistungsdaten
GB2286910B (en) Apparatus and method for prefetching data to load buffers in a bridge between two buses in a computer
NO20006278D0 (no) Fremgangsmåte og system for måling av data i en fluidtransportledning
DE69829442D1 (de) System und Verfahren für transparenten, globalen Zugang zu physikalischen Geräten in einem Rechnersystem
DE60110667D1 (de) System und Verfahren für komplettes Verwendbarkeitsmanagement in einem Hochverwendbarkeits- Computersystem
GB0313574D0 (en) Electronic system for collecting and communicating clinical order information in an acute care setting
DE60104229D1 (de) Signalübertragungssystem für Hochgeschwindigkeitsdatenübertragung sowie ein hierfür geeigneter Adapter
AU7149001A (en) Method for imaging discontinuities in seismic data using dip-steering
DE69927258D1 (de) Verfahren und gerät um daten durch redundante datenspeichereinheiten zu kaskadieren
DE69935737D1 (de) Verfahren und gerät um zeitliche und feste daten in einer einzelspeicherstruktur zu verwalten
DE69903936T2 (de) Verfahren und system für eine digitale bildaufnahmevorrichtung
AU2278701A (en) Method and apparatus for acquiring and organizing ink information in pen-aware computer systems
PT1327121E (pt) Método e aparelho para obter informação a partir de um contador de serviços
DE69716877T2 (de) System und Verfahren zur genauen Gradientberechnung für die Texturabbildung in einem Computergraphiksystem
DE60040358D1 (de) Verfahren um Verteilungsreferenzen mit Datenpaketen mittels eines TRIE-Speichers zu verknüpfen und Paketverarbeitungssystem das dieses Verfahren anwendet
ATA6732000A (de) Verfahren und einrichtung zur aufnahme von messdaten in einem hüttenwerk
EP1076997A4 (de) Vorrichtung und verfahren zur fehlerekennung in einem abgestastetembild
GB0223201D0 (en) Method for imaging discontinuities in seismic data
GB2347328B (en) Method and apparatus for detecting handshaking protocol errors on an asynchronous data bus
GB2336074B (en) Method and apparatus for the phase alignment of data in high-speed parallel data buses using a multi-phase low frequency sampling clock
DE60036441D1 (de) Verfahren und Vorrichtung zur effizienten Datenerfassung bei Computertomographen
DE10084612T1 (de) Ein Verfahren und eine Einrichtung für einen isochronen Datentransport über einen Asynchronen Bus

Legal Events

Date Code Title Description
8364 No opposition during term of opposition