DE60143856D1 - Sonos-bauelementeisolation - Google Patents

Sonos-bauelementeisolation

Info

Publication number
DE60143856D1
DE60143856D1 DE60143856T DE60143856T DE60143856D1 DE 60143856 D1 DE60143856 D1 DE 60143856D1 DE 60143856 T DE60143856 T DE 60143856T DE 60143856 T DE60143856 T DE 60143856T DE 60143856 D1 DE60143856 D1 DE 60143856D1
Authority
DE
Germany
Prior art keywords
sonos
components insulation
insulation
sonos components
components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60143856T
Other languages
English (en)
Inventor
Jean Yee-Mei Yang
Mark T Ramsbey
Emmanuil Manos Lingunis
Yider Wu
Tazrien Kamal
Yi He
Edward Hsia
Hidehiko Shiraiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Spansion LLC
Original Assignee
Spansion LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Spansion LLC filed Critical Spansion LLC
Application granted granted Critical
Publication of DE60143856D1 publication Critical patent/DE60143856D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
DE60143856T 2001-06-27 2001-12-14 Sonos-bauelementeisolation Expired - Lifetime DE60143856D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/893,279 US6436768B1 (en) 2001-06-27 2001-06-27 Source drain implant during ONO formation for improved isolation of SONOS devices
PCT/US2001/049047 WO2003003451A1 (en) 2001-06-27 2001-12-14 Isolation of sonos devices

Publications (1)

Publication Number Publication Date
DE60143856D1 true DE60143856D1 (de) 2011-02-24

Family

ID=25401319

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60143856T Expired - Lifetime DE60143856D1 (de) 2001-06-27 2001-12-14 Sonos-bauelementeisolation

Country Status (6)

Country Link
US (1) US6436768B1 (de)
EP (1) EP1399965B1 (de)
JP (1) JP4885420B2 (de)
DE (1) DE60143856D1 (de)
TW (1) TW550786B (de)
WO (1) WO2003003451A1 (de)

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KR100399350B1 (ko) * 2001-08-09 2003-09-26 삼성전자주식회사 부유 트랩형 소자를 가지는 비휘발성 반도체 메모리 장치및 그 제조방법
US6925007B2 (en) * 2001-10-31 2005-08-02 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
US6897522B2 (en) * 2001-10-31 2005-05-24 Sandisk Corporation Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
TW519734B (en) * 2001-12-04 2003-02-01 Macronix Int Co Ltd Programming and erasing methods of non-volatile memory having nitride tunneling layer
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US6730564B1 (en) * 2002-08-12 2004-05-04 Fasl, Llc Salicided gate for virtual ground arrays
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
JP2004193226A (ja) * 2002-12-09 2004-07-08 Nec Electronics Corp 不揮発性半導体記憶装置およびその製造方法
DE10259783A1 (de) * 2002-12-19 2004-07-15 Infineon Technologies Ag Verfahren zur Verbesserung der Prozessschrittfolge bei der Herstellung von Halbleiterspeichern
US6797567B2 (en) * 2002-12-24 2004-09-28 Macronix International Co., Ltd. High-K tunneling dielectric for read only memory device and fabrication method thereof
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US6794764B1 (en) * 2003-03-05 2004-09-21 Advanced Micro Devices, Inc. Charge-trapping memory arrays resistant to damage from contact hole information
US7015101B2 (en) * 2003-10-09 2006-03-21 Chartered Semiconductor Manufacturing Ltd. Multi-level gate SONOS flash memory device with high voltage oxide and method for the fabrication thereof
US7067362B2 (en) * 2003-10-17 2006-06-27 Chartered Semiconductor Manufacturing Ltd. Integrated circuit with protected implantation profiles and method for the formation thereof
US6962849B1 (en) 2003-12-05 2005-11-08 Advanced Micro Devices, Inc. Hard mask spacer for sublithographic bitline
KR100721547B1 (ko) * 2003-12-29 2007-05-23 주식회사 하이닉스반도체 고속으로 데이터 엑세스를 하기 위한 반도체 메모리 장치
KR100567757B1 (ko) * 2003-12-30 2006-04-05 동부아남반도체 주식회사 반도체 소자의 제조 방법
US20050251617A1 (en) * 2004-05-07 2005-11-10 Sinclair Alan W Hybrid non-volatile memory system
US6958272B2 (en) * 2004-01-12 2005-10-25 Advanced Micro Devices, Inc. Pocket implant for complementary bit disturb improvement and charging improvement of SONOS memory cell
US6872609B1 (en) 2004-01-12 2005-03-29 Advanced Micro Devices, Inc. Narrow bitline using Safier for mirrorbit
US7151692B2 (en) * 2004-01-27 2006-12-19 Macronix International Co., Ltd. Operation scheme for programming charge trapping non-volatile memory
US7209389B2 (en) * 2004-02-03 2007-04-24 Macronix International Co., Ltd. Trap read only non-volatile memory (TROM)
US7158411B2 (en) * 2004-04-01 2007-01-02 Macronix International Co., Ltd. Integrated code and data flash memory
US7133313B2 (en) * 2004-04-26 2006-11-07 Macronix International Co., Ltd. Operation scheme with charge balancing for charge trapping non-volatile memory
US7164603B2 (en) * 2004-04-26 2007-01-16 Yen-Hao Shih Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory
US7209390B2 (en) * 2004-04-26 2007-04-24 Macronix International Co., Ltd. Operation scheme for spectrum shift in charge trapping non-volatile memory
US7075828B2 (en) * 2004-04-26 2006-07-11 Macronix International Co., Intl. Operation scheme with charge balancing erase for charge trapping non-volatile memory
US7187590B2 (en) * 2004-04-26 2007-03-06 Macronix International Co., Ltd. Method and system for self-convergent erase in charge trapping memory cells
US6989320B2 (en) * 2004-05-11 2006-01-24 Advanced Micro Devices, Inc. Bitline implant utilizing dual poly
US6878988B1 (en) 2004-06-02 2005-04-12 United Microelectronics Corp. Non-volatile memory with induced bit lines
US7176113B1 (en) 2004-06-07 2007-02-13 Spansion Llc LDC implant for mirrorbit to improve Vt roll-off and form sharper junction
US7190614B2 (en) * 2004-06-17 2007-03-13 Macronix International Co., Ltd. Operation scheme for programming charge trapping non-volatile memory
TWI250526B (en) * 2004-06-24 2006-03-01 Macronix Int Co Ltd Operation scheme with high work function gate and charge balancing for charge trapping non-volatile memory
US7106625B2 (en) * 2004-07-06 2006-09-12 Macronix International Co, Td Charge trapping non-volatile memory with two trapping locations per gate, and method for operating same
US20060007732A1 (en) * 2004-07-06 2006-01-12 Macronix International Co., Ltd. Charge trapping non-volatile memory and method for operating same
US20060046403A1 (en) * 2004-08-31 2006-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming separated charge-holding regions in a semiconductor device
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7133317B2 (en) * 2004-11-19 2006-11-07 Macronix International Co., Ltd. Method and apparatus for programming nonvolatile memory
US20060113586A1 (en) * 2004-11-29 2006-06-01 Macronix International Co., Ltd. Charge trapping dielectric structure for non-volatile memory
US7315474B2 (en) * 2005-01-03 2008-01-01 Macronix International Co., Ltd Non-volatile memory cells, memory arrays including the same and methods of operating cells and arrays
US8482052B2 (en) 2005-01-03 2013-07-09 Macronix International Co., Ltd. Silicon on insulator and thin film transistor bandgap engineered split gate memory
US7473589B2 (en) 2005-12-09 2009-01-06 Macronix International Co., Ltd. Stacked thin film transistor, non-volatile memory devices and methods for fabricating the same
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US7158420B2 (en) * 2005-04-29 2007-01-02 Macronix International Co., Ltd. Inversion bit line, charge trapping non-volatile memory and method of operating same
US7786512B2 (en) 2005-07-18 2010-08-31 Saifun Semiconductors Ltd. Dense non-volatile memory array and method of fabrication
US7763927B2 (en) * 2005-12-15 2010-07-27 Macronix International Co., Ltd. Non-volatile memory device having a nitride-oxide dielectric layer
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US7704865B2 (en) * 2005-08-23 2010-04-27 Macronix International Co., Ltd. Methods of forming charge-trapping dielectric layers for semiconductor memory devices
KR100719219B1 (ko) * 2005-09-20 2007-05-16 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법
US7881123B2 (en) * 2005-09-23 2011-02-01 Macronix International Co., Ltd. Multi-operation mode nonvolatile memory
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7907450B2 (en) 2006-05-08 2011-03-15 Macronix International Co., Ltd. Methods and apparatus for implementing bit-by-bit erase of a flash memory device
US8587049B2 (en) * 2006-07-17 2013-11-19 Spansion, Llc Memory cell system with charge trap
US20080023776A1 (en) * 2006-07-25 2008-01-31 Micrel, Incorporated Metal oxide semiconductor device with improved threshold voltage and drain junction breakdown voltage and method for fabricating same
US8143661B2 (en) * 2006-10-10 2012-03-27 Spansion Llc Memory cell system with charge trap
US8772858B2 (en) 2006-10-11 2014-07-08 Macronix International Co., Ltd. Vertical channel memory and manufacturing method thereof and operating method using the same
US7811890B2 (en) 2006-10-11 2010-10-12 Macronix International Co., Ltd. Vertical channel transistor structure and manufacturing method thereof
US20080096357A1 (en) * 2006-10-20 2008-04-24 Spansion Llc Method for manufacturing a memory device
US8223540B2 (en) 2007-02-02 2012-07-17 Macronix International Co., Ltd. Method and apparatus for double-sided biasing of nonvolatile memory
US7737488B2 (en) 2007-08-09 2010-06-15 Macronix International Co., Ltd. Blocking dielectric engineered charge trapping memory cell with high speed erase
US8345475B2 (en) * 2009-11-17 2013-01-01 International Business Machines Corporation Non volatile cell and architecture with single bit random access read, program and erase
US9240405B2 (en) 2011-04-19 2016-01-19 Macronix International Co., Ltd. Memory with off-chip controller
US8772057B1 (en) 2011-05-13 2014-07-08 Cypress Semiconductor Corporation Inline method to monitor ONO stack quality
US8981459B2 (en) * 2013-03-12 2015-03-17 Macronix International Co., Ltd. Structure and manufacturing method of a non-volatile memory
US9312293B2 (en) * 2013-08-27 2016-04-12 Semiconductor Components Industries, Llc Range modulated implants for image sensors
US8916432B1 (en) * 2014-01-21 2014-12-23 Cypress Semiconductor Corporation Methods to integrate SONOS into CMOS flow
JP2019102520A (ja) * 2017-11-29 2019-06-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

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Also Published As

Publication number Publication date
JP2004522312A (ja) 2004-07-22
US6436768B1 (en) 2002-08-20
JP4885420B2 (ja) 2012-02-29
TW550786B (en) 2003-09-01
EP1399965B1 (de) 2011-01-12
WO2003003451A1 (en) 2003-01-09
EP1399965A1 (de) 2004-03-24

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