DE602004012563D1 - Mehrfädiges DMA - Google Patents
Mehrfädiges DMAInfo
- Publication number
- DE602004012563D1 DE602004012563D1 DE602004012563T DE602004012563T DE602004012563D1 DE 602004012563 D1 DE602004012563 D1 DE 602004012563D1 DE 602004012563 T DE602004012563 T DE 602004012563T DE 602004012563 T DE602004012563 T DE 602004012563T DE 602004012563 D1 DE602004012563 D1 DE 602004012563D1
- Authority
- DE
- Germany
- Prior art keywords
- dma
- threaded
- threaded dma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04292406A EP1645968B1 (de) | 2004-10-11 | 2004-10-11 | Mehrfädiges DMA |
Publications (2)
Publication Number | Publication Date |
---|---|
DE602004012563D1 true DE602004012563D1 (de) | 2008-04-30 |
DE602004012563T2 DE602004012563T2 (de) | 2009-05-07 |
Family
ID=34931446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004012563T Active DE602004012563T2 (de) | 2004-10-11 | 2004-10-11 | Mehrfädiges DMA |
Country Status (3)
Country | Link |
---|---|
US (1) | US7761617B2 (de) |
EP (1) | EP1645968B1 (de) |
DE (1) | DE602004012563T2 (de) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7546391B2 (en) * | 2005-05-13 | 2009-06-09 | Texas Instruments Incorporated | Direct memory access channel controller with quick channels, event queue and active channel memory protection |
US7546392B2 (en) * | 2005-05-13 | 2009-06-09 | Texas Instruments Incorporated | Data transfer with single channel controller controlling plural transfer controllers |
US7797467B2 (en) * | 2005-11-01 | 2010-09-14 | Lsi Corporation | Systems for implementing SDRAM controllers, and buses adapted to include advanced high performance bus features |
US7779174B2 (en) * | 2006-11-03 | 2010-08-17 | Samsung Electronics Co., Ltd. | Method and apparatus for dynamically changing burst length using direct memory access control |
US7743179B2 (en) * | 2007-03-30 | 2010-06-22 | Via Technologies, Inc. | Data transmission methods |
JP5108690B2 (ja) * | 2008-09-08 | 2012-12-26 | ルネサスエレクトロニクス株式会社 | Dma装置及びdma転送方法 |
US8209523B2 (en) * | 2009-01-22 | 2012-06-26 | Intel Mobile Communications GmbH | Data moving processor |
US8881106B2 (en) * | 2009-12-26 | 2014-11-04 | Intel Corporation | Debugging parallel software using speculatively executed code sequences in a multiple core environment |
US8706923B2 (en) * | 2010-09-14 | 2014-04-22 | Texas Instruments Incorported | Methods and systems for direct memory access (DMA) in-flight status |
US9319880B2 (en) * | 2010-09-15 | 2016-04-19 | Intel Corporation | Reformatting data to decrease bandwidth between a video encoder and a buffer |
US8842735B2 (en) * | 2010-10-26 | 2014-09-23 | Sony Corporation | Method to improve detection of motion with phase correlation |
US9858241B2 (en) | 2013-11-05 | 2018-01-02 | Oracle International Corporation | System and method for supporting optimized buffer utilization for packet processing in a networking device |
US8634415B2 (en) | 2011-02-16 | 2014-01-21 | Oracle International Corporation | Method and system for routing network traffic for a blade server |
US20140237170A1 (en) * | 2011-09-13 | 2014-08-21 | Kabushiki Kaisha Toshiba | Storage device, and read command executing method |
US9110715B2 (en) | 2013-02-28 | 2015-08-18 | Oracle International Corporation | System and method for using a sequencer in a concurrent priority queue |
US10095562B2 (en) | 2013-02-28 | 2018-10-09 | Oracle International Corporation | System and method for transforming a queue from non-blocking to blocking |
US8689237B2 (en) | 2011-09-22 | 2014-04-01 | Oracle International Corporation | Multi-lane concurrent bag for facilitating inter-thread communication |
US9378045B2 (en) * | 2013-02-28 | 2016-06-28 | Oracle International Corporation | System and method for supporting cooperative concurrency in a middleware machine environment |
GB2495959A (en) | 2011-10-26 | 2013-05-01 | Imagination Tech Ltd | Multi-threaded memory access processor |
WO2015069408A1 (en) * | 2013-11-05 | 2015-05-14 | Oracle International Corporation | System and method for supporting efficient packet processing model and optimized buffer utilization for packet processing in a network environment |
US9489327B2 (en) | 2013-11-05 | 2016-11-08 | Oracle International Corporation | System and method for supporting an efficient packet processing model in a network environment |
CN106502935A (zh) * | 2016-11-04 | 2017-03-15 | 郑州云海信息技术有限公司 | Fpga异构加速系统、数据传输方法及fpga |
US11294678B2 (en) | 2018-05-29 | 2022-04-05 | Advanced Micro Devices, Inc. | Scheduler queue assignment |
US11334384B2 (en) * | 2019-12-10 | 2022-05-17 | Advanced Micro Devices, Inc. | Scheduler queue assignment burst mode |
CN114385528A (zh) | 2020-10-16 | 2022-04-22 | 瑞昱半导体股份有限公司 | 直接记忆体存取控制器、使用其之电子装置以及操作其的方法 |
US11948000B2 (en) | 2020-10-27 | 2024-04-02 | Advanced Micro Devices, Inc. | Gang scheduling for low-latency task synchronization |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7181548B2 (en) | 1998-10-30 | 2007-02-20 | Lsi Logic Corporation | Command queueing engine |
US6182183B1 (en) | 1998-11-13 | 2001-01-30 | Sonics, Inc. | Communications system and method with multilevel connection identification |
US6633926B1 (en) * | 1998-11-30 | 2003-10-14 | Matsushita Electric Industrial Co., Ltd. | DMA transfer device capable of high-speed consecutive access to pages in a memory |
GB9909196D0 (en) * | 1999-04-21 | 1999-06-16 | Texas Instruments Ltd | Transfer controller with hub and ports architecture |
JP2000347987A (ja) | 1999-06-07 | 2000-12-15 | Matsushita Electric Ind Co Ltd | Dma転送装置 |
CA2388790A1 (en) | 2002-06-03 | 2003-12-03 | Catena Networks Canada Inc. | Direct memory access circuit with atm support |
US6874054B2 (en) * | 2002-12-19 | 2005-03-29 | Emulex Design & Manufacturing Corporation | Direct memory access controller system with message-based programming |
KR100513398B1 (ko) * | 2003-01-08 | 2005-09-09 | 삼성전자주식회사 | 듀얼프로세서의 아이피 공유장치 및 그방법 |
JP4446373B2 (ja) * | 2003-03-19 | 2010-04-07 | パナソニック株式会社 | プロセッサ、データ共有装置 |
US20050223131A1 (en) * | 2004-04-02 | 2005-10-06 | Goekjian Kenneth S | Context-based direct memory access engine for use with a memory system shared by devices associated with multiple input and output ports |
US20060031603A1 (en) * | 2004-08-09 | 2006-02-09 | Bradfield Travis A | Multi-threaded/multi-issue DMA engine data transfer system |
-
2004
- 2004-10-11 EP EP04292406A patent/EP1645968B1/de not_active Expired - Fee Related
- 2004-10-11 DE DE602004012563T patent/DE602004012563T2/de active Active
-
2005
- 2005-03-17 US US11/082,564 patent/US7761617B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP1645968A1 (de) | 2006-04-12 |
US7761617B2 (en) | 2010-07-20 |
US20060080478A1 (en) | 2006-04-13 |
EP1645968B1 (de) | 2008-03-19 |
DE602004012563T2 (de) | 2009-05-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |