DE602005010652D1 - Entwurf für Kanalausrichtung, Fehlerbehandlung und Taktrouting unter Verwendung von festverdrahteten Blöcken zur Datenübertragung innerhalb von programmierbaren integrierten Schaltungen - Google Patents

Entwurf für Kanalausrichtung, Fehlerbehandlung und Taktrouting unter Verwendung von festverdrahteten Blöcken zur Datenübertragung innerhalb von programmierbaren integrierten Schaltungen

Info

Publication number
DE602005010652D1
DE602005010652D1 DE602005010652T DE602005010652T DE602005010652D1 DE 602005010652 D1 DE602005010652 D1 DE 602005010652D1 DE 602005010652 T DE602005010652 T DE 602005010652T DE 602005010652 T DE602005010652 T DE 602005010652T DE 602005010652 D1 DE602005010652 D1 DE 602005010652D1
Authority
DE
Germany
Prior art keywords
channel alignment
error handling
data
hip
programmable logic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005010652T
Other languages
English (en)
Inventor
Wageningen Darren Van
Curt Wortman
Boon-Jin Ang
Trow-Pang Chong
Dan Mansur
Ali Burney
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Altera Corp filed Critical Altera Corp
Publication of DE602005010652D1 publication Critical patent/DE602005010652D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Logic Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
DE602005010652T 2004-12-13 2005-09-02 Entwurf für Kanalausrichtung, Fehlerbehandlung und Taktrouting unter Verwendung von festverdrahteten Blöcken zur Datenübertragung innerhalb von programmierbaren integrierten Schaltungen Active DE602005010652D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/011,543 US7434192B2 (en) 2004-12-13 2004-12-13 Techniques for optimizing design of a hard intellectual property block for data transmission

Publications (1)

Publication Number Publication Date
DE602005010652D1 true DE602005010652D1 (de) 2008-12-11

Family

ID=35406162

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005010652T Active DE602005010652D1 (de) 2004-12-13 2005-09-02 Entwurf für Kanalausrichtung, Fehlerbehandlung und Taktrouting unter Verwendung von festverdrahteten Blöcken zur Datenübertragung innerhalb von programmierbaren integrierten Schaltungen

Country Status (6)

Country Link
US (2) US7434192B2 (de)
EP (1) EP1670199B1 (de)
JP (1) JP2006174460A (de)
CN (1) CN1791120B (de)
AT (1) ATE413049T1 (de)
DE (1) DE602005010652D1 (de)

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US8069425B2 (en) * 2007-06-27 2011-11-29 Tabula, Inc. Translating a user design in a configurable IC for debugging the user design
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US8638792B2 (en) * 2010-01-22 2014-01-28 Synopsys, Inc. Packet switch based logic replication
US8397195B2 (en) * 2010-01-22 2013-03-12 Synopsys, Inc. Method and system for packet switch based logic replication
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CN105335321A (zh) * 2015-08-31 2016-02-17 成都嘉纳海威科技有限责任公司 一种用于数据收发的自对准接口电路
CN105263264A (zh) * 2015-10-08 2016-01-20 上海新跃仪表厂 具有简单连接结构的复杂走线pcb及其制备方法
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KR102093459B1 (ko) * 2016-02-02 2020-03-25 자일링크스 인코포레이티드 액티브-바이-액티브 프로그래밍가능 디바이스
CN111385065B (zh) * 2020-05-29 2020-09-11 湖南戎腾网络科技有限公司 一种接口速率自适应装置及方法
CN114371822B (zh) * 2021-12-13 2023-12-01 青岛信芯微电子科技股份有限公司 数据传输装置、芯片、显示设备和数据传输方法

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Also Published As

Publication number Publication date
US20060125517A1 (en) 2006-06-15
EP1670199B1 (de) 2008-10-29
US20080297192A1 (en) 2008-12-04
CN1791120A (zh) 2006-06-21
JP2006174460A (ja) 2006-06-29
US7434192B2 (en) 2008-10-07
EP1670199A1 (de) 2006-06-14
US7843216B2 (en) 2010-11-30
CN1791120B (zh) 2010-10-13
ATE413049T1 (de) 2008-11-15

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