DE602006011289D1 - Muster mit geringerem abstand im zusammenhang mit photolithographischen merkmalen - Google Patents

Muster mit geringerem abstand im zusammenhang mit photolithographischen merkmalen

Info

Publication number
DE602006011289D1
DE602006011289D1 DE602006011289T DE602006011289T DE602006011289D1 DE 602006011289 D1 DE602006011289 D1 DE 602006011289D1 DE 602006011289 T DE602006011289 T DE 602006011289T DE 602006011289 T DE602006011289 T DE 602006011289T DE 602006011289 D1 DE602006011289 D1 DE 602006011289D1
Authority
DE
Germany
Prior art keywords
patterns
connection
less spot
photolithographic characteristics
photolithographic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006011289T
Other languages
English (en)
Inventor
Luan Tran
William T Rericha
John Lee
Ramakanth Alapati
Shahla Honarkhah
Shuang Meng
Puneet Sharma
Jingyi Bai
Zhiping Yin
Paul Morgan
Mirzafer K Abatchev
Gurtej S Sandhu
Mark D Durcan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE602006011289D1 publication Critical patent/DE602006011289D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338Process specially adapted to improve the resolution of the mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088Process specially adapted to improve the resolution of the mask
DE602006011289T 2005-03-15 2006-03-03 Muster mit geringerem abstand im zusammenhang mit photolithographischen merkmalen Active DE602006011289D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US66232305P 2005-03-15 2005-03-15
US11/214,544 US7253118B2 (en) 2005-03-15 2005-08-29 Pitch reduced patterns relative to photolithography features
PCT/US2006/007739 WO2006101695A1 (en) 2005-03-15 2006-03-03 Pitch reduced patterns relative to photolithography features

Publications (1)

Publication Number Publication Date
DE602006011289D1 true DE602006011289D1 (de) 2010-02-04

Family

ID=36625823

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006011289T Active DE602006011289D1 (de) 2005-03-15 2006-03-03 Muster mit geringerem abstand im zusammenhang mit photolithographischen merkmalen

Country Status (7)

Country Link
US (7) US7253118B2 (de)
EP (1) EP1861864B1 (de)
JP (1) JP4945740B2 (de)
KR (1) KR100921588B1 (de)
DE (1) DE602006011289D1 (de)
TW (1) TWI302635B (de)
WO (1) WO2006101695A1 (de)

Families Citing this family (332)

* Cited by examiner, † Cited by third party
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US8119535B2 (en) 2012-02-21
EP1861864A1 (de) 2007-12-05
KR20070116108A (ko) 2007-12-06
TW200643609A (en) 2006-12-16
US8598632B2 (en) 2013-12-03
WO2006101695A1 (en) 2006-09-28
US8048812B2 (en) 2011-11-01
EP1861864B1 (de) 2009-12-23
US20100092891A1 (en) 2010-04-15
US20100210111A1 (en) 2010-08-19
US7718540B2 (en) 2010-05-18
US20070161251A1 (en) 2007-07-12
US8207576B2 (en) 2012-06-26
JP4945740B2 (ja) 2012-06-06
JP2008536297A (ja) 2008-09-04
WO2006101695B1 (en) 2006-11-23
US20120256309A1 (en) 2012-10-11
US20070138526A1 (en) 2007-06-21
US20070128856A1 (en) 2007-06-07
US7253118B2 (en) 2007-08-07
US7651951B2 (en) 2010-01-26
US20060211260A1 (en) 2006-09-21
KR100921588B1 (ko) 2009-10-13
TWI302635B (en) 2008-11-01

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