DE60207210D1 - System mit Schnittstellen, einem Schalter und einer Speicherbrücke mit cc-numa (cache-coherent non-uniform memory access) - Google Patents

System mit Schnittstellen, einem Schalter und einer Speicherbrücke mit cc-numa (cache-coherent non-uniform memory access)

Info

Publication number
DE60207210D1
DE60207210D1 DE60207210T DE60207210T DE60207210D1 DE 60207210 D1 DE60207210 D1 DE 60207210D1 DE 60207210 T DE60207210 T DE 60207210T DE 60207210 T DE60207210 T DE 60207210T DE 60207210 D1 DE60207210 D1 DE 60207210D1
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DE
Germany
Prior art keywords
memory bridge
interconnect
switch
numa
cache
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60207210T
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English (en)
Other versions
DE60207210T2 (de
Inventor
Joseph B Rowlands
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Broadcom Corp
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Publication of DE60207210D1 publication Critical patent/DE60207210D1/de
Application granted granted Critical
Publication of DE60207210T2 publication Critical patent/DE60207210T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G06F12/082—Associative directories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087—Synchronisation or serialisation instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1048—Scalability
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25—Using a specific main memory architecture
    • G06F2212/254—Distributed memory
    • G06F2212/2542—Non-uniform memory access [NUMA] architecture
DE60207210T 2002-05-15 2002-11-20 System mit Schnittstellen, einem Schalter und einer Speicherbrücke mit cc-numa (cache-coherent non-uniform memory access) Expired - Lifetime DE60207210T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US38074002P 2002-05-15 2002-05-15
US380740P 2002-05-15
US270028 2002-10-11
US10/270,028 US7266587B2 (en) 2002-05-15 2002-10-11 System having interfaces, switch, and memory bridge for CC-NUMA operation

Publications (2)

Publication Number Publication Date
DE60207210D1 true DE60207210D1 (de) 2005-12-15
DE60207210T2 DE60207210T2 (de) 2006-07-27

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
DE60207210T Expired - Lifetime DE60207210T2 (de) 2002-05-15 2002-11-20 System mit Schnittstellen, einem Schalter und einer Speicherbrücke mit cc-numa (cache-coherent non-uniform memory access)

Country Status (4)

Country Link
US (7) US7266587B2 (de)
EP (1) EP1363196B1 (de)
AT (1) ATE309574T1 (de)
DE (1) DE60207210T2 (de)

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EP1363196B1 (de) 2005-11-09
US20030217229A1 (en) 2003-11-20
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US7340546B2 (en) 2008-03-04
US6988168B2 (en) 2006-01-17
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US20070282968A1 (en) 2007-12-06
US20030217216A1 (en) 2003-11-20
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US7343456B2 (en) 2008-03-11
US20030217238A1 (en) 2003-11-20
US7266587B2 (en) 2007-09-04
DE60207210T2 (de) 2006-07-27
US6948035B2 (en) 2005-09-20
US20030229676A1 (en) 2003-12-11
US20030233495A1 (en) 2003-12-18

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