DE60235516D1 - Verfahren und Schaltung zur Ausführung einer FIFO Struktur - Google Patents
Verfahren und Schaltung zur Ausführung einer FIFO StrukturInfo
- Publication number
- DE60235516D1 DE60235516D1 DE60235516T DE60235516T DE60235516D1 DE 60235516 D1 DE60235516 D1 DE 60235516D1 DE 60235516 T DE60235516 T DE 60235516T DE 60235516 T DE60235516 T DE 60235516T DE 60235516 D1 DE60235516 D1 DE 60235516D1
- Authority
- DE
- Germany
- Prior art keywords
- implementing
- circuit
- fifo structure
- fifo
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2205/00—Indexing scheme relating to group G06F5/00; Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F2205/10—Indexing scheme relating to groups G06F5/10 - G06F5/14
- G06F2205/106—Details of pointers, i.e. structure of the address generators
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/956,374 US6696854B2 (en) | 2001-09-17 | 2001-09-17 | Methods and circuitry for implementing first-in first-out structure |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60235516D1 true DE60235516D1 (de) | 2010-04-15 |
Family
ID=25498151
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60235516T Expired - Lifetime DE60235516D1 (de) | 2001-09-17 | 2002-05-15 | Verfahren und Schaltung zur Ausführung einer FIFO Struktur |
Country Status (3)
Country | Link |
---|---|
US (6) | US6696854B2 (de) |
EP (1) | EP1293888B1 (de) |
DE (1) | DE60235516D1 (de) |
Families Citing this family (49)
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US6696854B2 (en) * | 2001-09-17 | 2004-02-24 | Broadcom Corporation | Methods and circuitry for implementing first-in first-out structure |
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US6978344B2 (en) * | 2002-12-18 | 2005-12-20 | Lsi Logic Corporation | Shift register control of a circular elasticity buffer |
US7477716B2 (en) | 2003-06-25 | 2009-01-13 | Mosaid Technologies, Inc. | Start up circuit for delay locked loop |
US8386648B1 (en) * | 2003-06-26 | 2013-02-26 | Nvidia Corporation | Hardware support system for accelerated disk I/O |
US8683132B1 (en) | 2003-09-29 | 2014-03-25 | Nvidia Corporation | Memory controller for sequentially prefetching data for a processor of a computer system |
US8356142B1 (en) | 2003-11-12 | 2013-01-15 | Nvidia Corporation | Memory controller for non-sequentially prefetching data for a processor of a computer system |
US8700808B2 (en) * | 2003-12-01 | 2014-04-15 | Nvidia Corporation | Hardware support system for accelerated disk I/O |
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US20050160215A1 (en) * | 2004-01-20 | 2005-07-21 | International Business Machines Corporation | Flow through asynchronous elastic FIFO apparatus and method for implementing multi-engine parsing and authentication |
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TWI325532B (en) * | 2006-09-14 | 2010-06-01 | Novatek Microelectronics Corp | Controlling circuit and method for power saving |
US7570534B2 (en) * | 2007-02-15 | 2009-08-04 | Apple Inc. | Enqueue event first-in, first-out buffer (FIFO) |
US20080240324A1 (en) * | 2007-03-27 | 2008-10-02 | Microsoft Corporation | Independent Dispatch of Multiple Streaming Queues Via Reserved Time Slots |
US8510485B2 (en) * | 2007-08-31 | 2013-08-13 | Apple Inc. | Low power digital interface |
US20090180335A1 (en) * | 2008-01-15 | 2009-07-16 | Sivaraman Chokkalingam | Integrated circuit with reduced pointer uncertainly |
JP5185697B2 (ja) * | 2008-05-28 | 2013-04-17 | ルネサスエレクトロニクス株式会社 | 表示装置、表示パネルドライバ、表示パネルの駆動方法、及び表示パネルドライバへの画像データ供給方法 |
JP2010045610A (ja) * | 2008-08-13 | 2010-02-25 | Toshiba Corp | 半導体集積回路 |
US8356128B2 (en) * | 2008-09-16 | 2013-01-15 | Nvidia Corporation | Method and system of reducing latencies associated with resource allocation by using multiple arbiters |
US8370552B2 (en) * | 2008-10-14 | 2013-02-05 | Nvidia Corporation | Priority based bus arbiters avoiding deadlock and starvation on buses that support retrying of transactions |
US8698823B2 (en) * | 2009-04-08 | 2014-04-15 | Nvidia Corporation | System and method for deadlock-free pipelining |
TWI433163B (zh) * | 2009-12-23 | 2014-04-01 | Mstar Semiconductor Inc | 記憶體控制器及其控制方法 |
US8850250B2 (en) | 2010-06-01 | 2014-09-30 | Intel Corporation | Integration of processor and input/output hub |
US8782456B2 (en) | 2010-06-01 | 2014-07-15 | Intel Corporation | Dynamic and idle power reduction sequence using recombinant clock and power gating |
US9146610B2 (en) * | 2010-09-25 | 2015-09-29 | Intel Corporation | Throttling integrated link |
US8054103B1 (en) * | 2010-10-22 | 2011-11-08 | Texas Instruments Incorporated | Synchronous clock multiplexing and output-enable |
US8832393B2 (en) * | 2012-04-18 | 2014-09-09 | Lsi Corporation | Alignment for multiple FIFO pointers |
US9569385B2 (en) | 2013-09-09 | 2017-02-14 | Nvidia Corporation | Memory transaction ordering |
KR102200489B1 (ko) * | 2014-05-30 | 2021-01-11 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 그것을 포함하는 저장 장치 |
US9940097B1 (en) * | 2014-10-29 | 2018-04-10 | Netronome Systems, Inc. | Registered FIFO |
US10775836B2 (en) * | 2015-06-16 | 2020-09-15 | Synopsys, Inc. | Method for cycle accurate data transfer in a skewed synchronous clock domain |
US10146719B2 (en) | 2017-03-24 | 2018-12-04 | Micron Technology, Inc. | Semiconductor layered device with data bus |
TWI658470B (zh) | 2018-05-03 | 2019-05-01 | 智原科技股份有限公司 | 運用於雙倍資料率記憶體系統的先進先出電路 |
US10664432B2 (en) | 2018-05-23 | 2020-05-26 | Micron Technology, Inc. | Semiconductor layered device with data bus inversion |
US10964702B2 (en) | 2018-10-17 | 2021-03-30 | Micron Technology, Inc. | Semiconductor device with first-in-first-out circuit |
CN109799870B (zh) * | 2018-12-29 | 2021-03-05 | 深圳云天励飞技术有限公司 | 一种时钟控制电路及控制方法 |
US11378999B2 (en) * | 2019-12-23 | 2022-07-05 | Intel Corporation | Apparatus for generating synchronized clock signals, elec-tronic system, base station and mobile device |
EP4033347B1 (de) | 2020-08-12 | 2023-07-05 | Changxin Memory Technologies, Inc. | Fifo-speicher und speichervorrichtung |
CN114077415A (zh) * | 2020-08-12 | 2022-02-22 | 长鑫存储技术(上海)有限公司 | 先入先出存储器及存储装置 |
TWI771785B (zh) * | 2020-10-29 | 2022-07-21 | 晶豪科技股份有限公司 | 資料先進先出(fifo)電路 |
US11493951B2 (en) * | 2020-11-17 | 2022-11-08 | Rockwell Collins, Inc. | Precision latency control |
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-
2001
- 2001-09-17 US US09/956,374 patent/US6696854B2/en not_active Expired - Fee Related
-
2002
- 2002-05-15 DE DE60235516T patent/DE60235516D1/de not_active Expired - Lifetime
- 2002-05-15 EP EP02253454A patent/EP1293888B1/de not_active Expired - Fee Related
-
2003
- 2003-12-31 US US10/749,965 patent/US6963220B2/en not_active Expired - Lifetime
- 2003-12-31 US US10/750,098 patent/US6940306B2/en not_active Expired - Lifetime
-
2004
- 2004-12-30 US US11/027,193 patent/US6963221B2/en not_active Expired - Lifetime
- 2004-12-31 US US11/027,864 patent/US7167024B2/en not_active Expired - Lifetime
- 2004-12-31 US US11/027,848 patent/US7205792B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1293888A2 (de) | 2003-03-19 |
EP1293888B1 (de) | 2010-03-03 |
EP1293888A3 (de) | 2006-08-23 |
US20040156250A1 (en) | 2004-08-12 |
US6696854B2 (en) | 2004-02-24 |
US20030052708A1 (en) | 2003-03-20 |
US20050122815A1 (en) | 2005-06-09 |
US6940306B2 (en) | 2005-09-06 |
US6963221B2 (en) | 2005-11-08 |
US20050128846A1 (en) | 2005-06-16 |
US7167024B2 (en) | 2007-01-23 |
US7205792B2 (en) | 2007-04-17 |
US6963220B2 (en) | 2005-11-08 |
US20050117428A1 (en) | 2005-06-02 |
US20040158657A1 (en) | 2004-08-12 |
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Legal Events
Date | Code | Title | Description |
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8364 | No opposition during term of opposition |