DE60319774D1 - Verfahren und Schaltungsanordnung zur Erzeugung eines Steuersignals zur Impedanzanpassung - Google Patents

Verfahren und Schaltungsanordnung zur Erzeugung eines Steuersignals zur Impedanzanpassung

Info

Publication number: DE60319774D1
Authority: DE; Germany
Prior art keywords: generating; control signal; circuit arrangement; impedance matching; impedance
Prior art date: 2002-05-08
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE60319774T

Other languages

English (en)

Other versions

DE60319774T2 (de

Inventor

Tsuyoshi Ohno

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Renesas Electronics Corp

Original Assignee

NEC Electronics Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2002-05-08

Filing date

2003-05-08

Publication date

2008-04-30

2003-05-08 Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp

2008-04-30 Publication of DE60319774D1 publication Critical patent/DE60319774D1/de

2009-04-23 Application granted granted Critical

2009-04-23 Publication of DE60319774T2 publication Critical patent/DE60319774T2/de

2023-05-09 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0005—Modifications of input or output impedance
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0278—Arrangements for impedance matching

DE60319774T 2002-05-08 2003-05-08 Verfahren und Schaltungsanordnung zur Erzeugung eines Steuersignals zur Impedanzanpassung Expired - Lifetime DE60319774T2 (de)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
JP2002132552		2002-05-08
JP2002132552		2002-05-08

Publications (2)

Publication Number	Publication Date
DE60319774D1 true DE60319774D1 (de)	2008-04-30
DE60319774T2 DE60319774T2 (de)	2009-04-23

Family

ID=29717419

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE60319774T Expired - Lifetime DE60319774T2 (de)	2002-05-08	2003-05-08	Verfahren und Schaltungsanordnung zur Erzeugung eines Steuersignals zur Impedanzanpassung

Country Status (4)

Country	Link
US (1)	US6828820B2 (de)
EP (1)	EP1376863B1 (de)
DE (1)	DE60319774T2 (de)
TW (1)	TW589794B (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6924660B2 (en)	2003-09-08	2005-08-02	Rambus Inc.	Calibration methods and circuits for optimized on-die termination
JP4086757B2 (ja) *	2003-10-23	2008-05-14	Ｎｅｃエレクトロニクス株式会社	半導体集積回路の入出力インターフェース回路
GB0328574D0 (en) *	2003-12-10	2004-01-14	Ibm	Electronic component value trimming systems
KR100610007B1 (ko) *	2004-06-14	2006-08-08	삼성전자주식회사	임피던스 랜지 시프팅 기능을 갖는 반도체 장치의프로그래머블 임피던스 콘트롤 회로 및 그에 따른임피던스 랜지 시프팅 방법
US7888962B1 (en) *	2004-07-07	2011-02-15	Cypress Semiconductor Corporation	Impedance matching circuit
JP4562175B2 (ja) *	2004-08-31	2010-10-13	ルネサスエレクトロニクス株式会社	終端抵抗調整回路
DE102004044422B3 (de) *	2004-09-14	2006-03-30	Infineon Technologies Ag	Kalibrierungsschaltung für eine Treibersteuerschaltung und Treibersteuerschaltung
US20060066346A1 (en) *	2004-09-28	2006-03-30	Tat Lim Eugene S	Impedance compensation for I/O buffers
KR100588601B1 (ko) *	2005-06-09	2006-06-14	삼성전자주식회사	임피던스 제어 회로
US7679397B1 (en) *	2005-08-05	2010-03-16	Altera Corporation	Techniques for precision biasing output driver for a calibrated on-chip termination circuit
US7479800B1 (en) *	2005-09-29	2009-01-20	Cypress Semiconductor Corporation	Variable impedance sense architecture and method
US8036846B1 (en)	2005-10-20	2011-10-11	Cypress Semiconductor Corporation	Variable impedance sense architecture and method
US7388404B1 (en)	2006-07-26	2008-06-17	National Semiconductor Corporation	Driver circuit that limits the voltage of a wave front launched onto a transmission line
JP4205741B2 (ja)	2006-08-21	2009-01-07	エルピーダメモリ株式会社	キャリブレーション回路を有する半導体装置及びキャリブレーション方法
US7557603B2 (en) *	2006-08-29	2009-07-07	Micron Technology, Inc.	Method and apparatus for output driver calibration, and memory devices and system embodying same
US20080174353A1 (en) *	2007-01-18	2008-07-24	John Thomas Badar	Path delay adjustment circuitry using programmable driver
KR100820783B1 (ko) *	2007-03-02	2008-04-11	주식회사 하이닉스반도체	미스매치를 줄인 온 다이 터미네이션 장치
US7489125B2 (en) *	2007-04-02	2009-02-10	Teradyne, Inc.	Calibrating a tester using ESD protection circuitry
WO2009042236A1 (en) *	2007-09-27	2009-04-02	Cypress Semiconductor Corporation	Circuits and methods for programming integrated circuit input and output impedance
JP5006231B2 (ja) *	2008-02-26	2012-08-22	ルネサスエレクトロニクス株式会社	インピーダンス調整回路
US7688105B2 (en) *	2008-07-09	2010-03-30	Integrated Device Technology, Inc.	Impedance matching logic
JP2010130504A (ja) *	2008-11-28	2010-06-10	Renesas Electronics Corp	終端抵抗装置、半導体装置、及び終端抵抗の制御方法
US8237467B2 (en) *	2010-06-25	2012-08-07	National Semiconductor Corporation	Resistor-programmable device at low voltage
US9270268B2 (en)	2013-01-02	2016-02-23	International Business Machines Corporation	Compensated impedance calibration circuit
US9935632B1 (en) *	2017-07-19	2018-04-03	Micron Technology, Inc.	Methods and systems for averaging impedance calibration
US10885258B1 (en) *	2018-09-25	2021-01-05	Synopsys, Inc.	Fixing ESD path resistance errors in circuit design layout

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5243229A (en) *	1991-06-28	1993-09-07	At&T Bell Laboratories	Digitally controlled element sizing
JP3125699B2 (ja)	1996-12-25	2001-01-22	日本電気株式会社	データ同期回路
US6064224A (en) *	1998-07-31	2000-05-16	Hewlett--Packard Company	Calibration sharing for CMOS output driver
JP3515025B2 (ja) *	1999-09-22	2004-04-05	株式会社東芝	半導体装置
US6541996B1 (en) *	1999-12-21	2003-04-01	Ati International Srl	Dynamic impedance compensation circuit and method
JP2001217705A (ja) *	2000-01-31	2001-08-10	Fujitsu Ltd	Ｌｓｉデバイス
US6445245B1 (en) *	2000-10-06	2002-09-03	Xilinx, Inc.	Digitally controlled impedance for I/O of an integrated circuit device
IT1319130B1 (it) *	2000-11-23	2003-09-23	St Microelectronics Srl	Circuito di controllo di uno stadio di pilotaggio d'uscita di uncircuito integrato
EP1396126A2 (de) *	2001-05-21	2004-03-10	Acuid Corporation Limited	Verfahren und vorrichtung zur impedanzanpassung in einer übertragungsleitung

2003
- 2003-05-08 TW TW092112745A patent/TW589794B/zh not_active IP Right Cessation
- 2003-05-08 EP EP03400018A patent/EP1376863B1/de not_active Expired - Fee Related
- 2003-05-08 DE DE60319774T patent/DE60319774T2/de not_active Expired - Lifetime
- 2003-05-08 US US10/435,112 patent/US6828820B2/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP1376863A2 (de)	2004-01-02
TW200306705A (en)	2003-11-16
TW589794B (en)	2004-06-01
US6828820B2 (en)	2004-12-07
EP1376863B1 (de)	2008-03-19
US20040021481A1 (en)	2004-02-05
EP1376863A3 (de)	2006-01-04
DE60319774T2 (de)	2009-04-23

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Legal Events

Date	Code	Title	Description
2009-04-09	8364	No opposition during term of opposition
2012-08-28	R082	Change of representative	Ref document number: 1376863 Country of ref document: EP Representative=s name: STORK BAMBERGER PATENTANWAELTE, DE
2012-10-18	R081	Change of applicant/patentee	Ref document number: 1376863 Country of ref document: EP Owner name: RENESAS ELECTRONICS CORPORATION, JP Free format text: FORMER OWNER: NEC ELECTRONICS CORP., KAWASAKI, JP Effective date: 20120828
2012-10-18	R082	Change of representative	Ref document number: 1376863 Country of ref document: EP Representative=s name: STORK BAMBERGER PATENTANWAELTE, DE Effective date: 20120828