DE60325488D1 - Lose polarisiertes, heterogenes, rekonfigurierbares gatterfeld - Google Patents

Lose polarisiertes, heterogenes, rekonfigurierbares gatterfeld

Info

Publication number
DE60325488D1
DE60325488D1 DE60325488T DE60325488T DE60325488D1 DE 60325488 D1 DE60325488 D1 DE 60325488D1 DE 60325488 T DE60325488 T DE 60325488T DE 60325488 T DE60325488 T DE 60325488T DE 60325488 D1 DE60325488 D1 DE 60325488D1
Authority
DE
Germany
Prior art keywords
alus
multiplexers
clusters
gatterfield
heterogenic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60325488T
Other languages
English (en)
Inventor
Anthony I Stansfield
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Panasonic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp filed Critical Panasonic Corp
Application granted granted Critical
Publication of DE60325488D1 publication Critical patent/DE60325488D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842Speculative instruction execution
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3893Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733Controllable logic circuits
    • H03K19/1737Controllable logic circuits using multiplexers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724Structural details of logic blocks
    • H03K19/17728Reconfigurable logic blocks, e.g. lookup tables
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748Structural details of configuration resources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17796Structural details for adapting physical parameters for physical disposition of blocks
DE60325488T 2002-07-01 2003-06-02 Lose polarisiertes, heterogenes, rekonfigurierbares gatterfeld Expired - Lifetime DE60325488D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/188,388 US7471643B2 (en) 2002-07-01 2002-07-01 Loosely-biased heterogeneous reconfigurable arrays
PCT/EP2003/005783 WO2004003778A2 (en) 2002-07-01 2003-06-02 Loosely-biased heterogeneous reconfigurable arrays

Publications (1)

Publication Number Publication Date
DE60325488D1 true DE60325488D1 (de) 2009-02-05

Family

ID=29780116

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60325488T Expired - Lifetime DE60325488D1 (de) 2002-07-01 2003-06-02 Lose polarisiertes, heterogenes, rekonfigurierbares gatterfeld

Country Status (7)

Country Link
US (1) US7471643B2 (de)
EP (1) EP1535394B1 (de)
JP (1) JP4261478B2 (de)
AT (1) ATE418814T1 (de)
AU (1) AU2003245906A1 (de)
DE (1) DE60325488D1 (de)
WO (1) WO2004003778A2 (de)

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US20070186076A1 (en) * 2003-06-18 2007-08-09 Jones Anthony M Data pipeline transport system
EP1636725B1 (de) 2003-06-18 2018-05-16 Imagination Technologies Limited Register für einen integrierten schaltkreis und methode dafür
US7937557B2 (en) 2004-03-16 2011-05-03 Vns Portfolio Llc System and method for intercommunication between computers in an array
US7844668B2 (en) * 2004-07-30 2010-11-30 Microsoft Corporation Suggesting a discussion group based on indexing of the posts within that discussion group
US20060181243A1 (en) * 2005-02-11 2006-08-17 Nortel Networks Limited Use of location awareness to facilitate clinician-charger interaction in a healthcare environment
JP4527571B2 (ja) * 2005-03-14 2010-08-18 富士通株式会社 再構成可能演算処理装置
US7904695B2 (en) 2006-02-16 2011-03-08 Vns Portfolio Llc Asynchronous power saving computer
CN100346335C (zh) * 2005-12-02 2007-10-31 浙江大学 一种采用异步通信机制的可重构计算单元
US7966481B2 (en) 2006-02-16 2011-06-21 Vns Portfolio Llc Computer system and method for executing port communications without interrupting the receiving computer
US7904615B2 (en) * 2006-02-16 2011-03-08 Vns Portfolio Llc Asynchronous computer communication
US7751368B2 (en) * 2006-05-01 2010-07-06 Intel Corporation Providing CQI feedback to a transmitter station in a closed-loop MIMO system
CN101578767A (zh) * 2007-01-05 2009-11-11 Nxp股份有限公司 包含可编程逻辑单元矩阵的电路
US8805916B2 (en) * 2009-03-03 2014-08-12 Altera Corporation Digital signal processing circuitry with redundancy and bidirectional data paths
US8549055B2 (en) 2009-03-03 2013-10-01 Altera Corporation Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry
JP5015210B2 (ja) 2009-08-14 2012-08-29 株式会社半導体理工学研究センター 高周波信号生成回路
JP2014016894A (ja) * 2012-07-10 2014-01-30 Renesas Electronics Corp 並列演算装置、並列演算装置を備えたデータ処理システム、及び、データ処理プログラム
US9779785B2 (en) 2015-05-11 2017-10-03 Wisconsin Alumni Research Foundation Computer architecture using compute/storage tiles
US9628083B1 (en) * 2015-10-01 2017-04-18 Quicklogic Corporation Local routing network with selective fast paths for programmable logic device
US10191881B2 (en) * 2016-06-06 2019-01-29 Hewlett Packard Enterprise Development Lp Modifications to a stream processing topology during processing of a data stream
US10963265B2 (en) * 2017-04-21 2021-03-30 Micron Technology, Inc. Apparatus and method to switch configurable logic units
EP3704593A1 (de) * 2017-11-03 2020-09-09 Coherent Logix, Inc. Speichernetzprozessor
US11029958B1 (en) * 2019-12-28 2021-06-08 Intel Corporation Apparatuses, methods, and systems for configurable operand size operations in an operation configurable spatial accelerator

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Also Published As

Publication number Publication date
JP2005531952A (ja) 2005-10-20
US20040001445A1 (en) 2004-01-01
JP4261478B2 (ja) 2009-04-30
WO2004003778A3 (en) 2005-03-31
EP1535394A2 (de) 2005-06-01
US7471643B2 (en) 2008-12-30
AU2003245906A8 (en) 2004-01-19
EP1535394B1 (de) 2008-12-24
WO2004003778A2 (en) 2004-01-08
AU2003245906A1 (en) 2004-01-19
ATE418814T1 (de) 2009-01-15

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