DE60331799D1 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung

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Publication number
DE60331799D1
DE60331799D1 DE60331799T DE60331799T DE60331799D1 DE 60331799 D1 DE60331799 D1 DE 60331799D1 DE 60331799 T DE60331799 T DE 60331799T DE 60331799 T DE60331799 T DE 60331799T DE 60331799 D1 DE60331799 D1 DE 60331799D1
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DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60331799T
Other languages
English (en)
Inventor
Kenichi Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Semiconductor Ltd filed Critical Fujitsu Semiconductor Ltd
Application granted granted Critical
Publication of DE60331799D1 publication Critical patent/DE60331799D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
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    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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    • H01L23/53204—Conductive materials
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    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
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    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
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    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
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    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
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    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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    • H01L23/5329—Insulating materials
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    • H01L2924/0001—Technical content checked by a classifier
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DE60331799T 2002-07-31 2003-07-24 Halbleitervorrichtung Expired - Lifetime DE60331799D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002223343A JP3779243B2 (ja) 2002-07-31 2002-07-31 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
DE60331799D1 true DE60331799D1 (de) 2010-05-06

Family

ID=30112961

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60331799T Expired - Lifetime DE60331799D1 (de) 2002-07-31 2003-07-24 Halbleitervorrichtung

Country Status (7)

Country Link
US (31) US7301241B2 (de)
EP (6) EP2863431B1 (de)
JP (1) JP3779243B2 (de)
KR (1) KR100917455B1 (de)
CN (1) CN1294653C (de)
DE (1) DE60331799D1 (de)
TW (1) TWI223399B (de)

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US7400025B2 (en) 2003-05-21 2008-07-15 Texas Instruments Incorporated Integrated circuit inductor with integrated vias
US7198409B2 (en) 2003-06-30 2007-04-03 Adc Telecommunications, Inc. Fiber optic connector holder and method
JP4725092B2 (ja) * 2004-12-10 2011-07-13 ソニー株式会社 固体撮像装置及びその製造方法
US7323784B2 (en) * 2005-03-17 2008-01-29 Taiwan Semiconductor Manufacturing Co., Ltd. Top via pattern for bond pad structure
JP2007019188A (ja) * 2005-07-06 2007-01-25 Renesas Technology Corp 半導体集積回路装置およびその製造方法
KR100632467B1 (ko) * 2005-08-12 2006-10-09 삼성전자주식회사 반도체 메모리 소자 및 그 제조 방법
JP5038612B2 (ja) 2005-09-29 2012-10-03 富士通セミコンダクター株式会社 半導体装置
KR100650907B1 (ko) * 2005-12-29 2006-11-28 동부일렉트로닉스 주식회사 구리 금속으로 된 집적회로 인덕터 및 그 제조 방법
US7459792B2 (en) * 2006-06-19 2008-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Via layout with via groups placed in interlocked arrangement
KR100737155B1 (ko) * 2006-08-28 2007-07-06 동부일렉트로닉스 주식회사 반도체 소자의 고주파 인덕터 제조 방법
US20080067554A1 (en) * 2006-09-14 2008-03-20 Jae-Hun Jeong NAND flash memory device with 3-dimensionally arranged memory cell transistors
US20080099884A1 (en) * 2006-10-31 2008-05-01 Masahio Inohara Staggered guard ring structure
KR100995558B1 (ko) 2007-03-22 2010-11-22 후지쯔 세미컨덕터 가부시키가이샤 반도체 장치 및 반도체 장치의 제조 방법
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