DE68903141T2 - Ausgangspuffer mit stabiler ausgangsspannung. - Google Patents
Ausgangspuffer mit stabiler ausgangsspannung.Info
- Publication number
- DE68903141T2 DE68903141T2 DE8989111677T DE68903141T DE68903141T2 DE 68903141 T2 DE68903141 T2 DE 68903141T2 DE 8989111677 T DE8989111677 T DE 8989111677T DE 68903141 T DE68903141 T DE 68903141T DE 68903141 T2 DE68903141 T2 DE 68903141T2
- Authority
- DE
- Germany
- Prior art keywords
- output
- stable
- output voltage
- buffer
- output buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63159655A JPH073945B2 (ja) | 1988-06-27 | 1988-06-27 | Cmos出力回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68903141D1 DE68903141D1 (de) | 1992-11-12 |
DE68903141T2 true DE68903141T2 (de) | 1993-04-15 |
Family
ID=15698451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8989111677T Expired - Fee Related DE68903141T2 (de) | 1988-06-27 | 1989-06-27 | Ausgangspuffer mit stabiler ausgangsspannung. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4954729A (de) |
EP (1) | EP0348894B1 (de) |
JP (1) | JPH073945B2 (de) |
DE (1) | DE68903141T2 (de) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0777345B2 (ja) * | 1988-11-04 | 1995-08-16 | 三菱電機株式会社 | 半導体装置 |
KR920002426B1 (ko) * | 1989-05-31 | 1992-03-23 | 현대전자산업 주식회사 | 집적회로의 출력버퍼회로 |
US5036222A (en) * | 1990-02-22 | 1991-07-30 | National Semiconductor Corporation | Output buffer circuit with output voltage sensing for reducing switching induced noise |
JPH03283814A (ja) * | 1990-03-30 | 1991-12-13 | Nec Corp | 出力回路 |
US5089722A (en) * | 1990-04-02 | 1992-02-18 | Motorola, Inc. | High speed output buffer circuit with overlap current control |
JP2803428B2 (ja) * | 1992-02-17 | 1998-09-24 | 日本電気株式会社 | 入力バッファ |
US5365118A (en) * | 1992-06-04 | 1994-11-15 | Linear Technology Corp. | Circuit for driving two power mosfets in a half-bridge configuration |
US5453707A (en) * | 1993-01-13 | 1995-09-26 | Nec Corporation | Polyphase clock generation circuit |
US5349243A (en) * | 1993-06-30 | 1994-09-20 | Sgs-Thomson Microelectronics, Inc. | Latch controlled output driver |
US5430400A (en) * | 1993-08-03 | 1995-07-04 | Schlumberger Technologies Inc. | Driver circuits for IC tester |
US5396108A (en) * | 1993-09-30 | 1995-03-07 | Sgs-Thomson Microelectronics, Inc. | Latch controlled output driver |
SE515490C2 (sv) * | 1993-12-03 | 2001-08-13 | Ericsson Telefon Ab L M | Signaleringssystem |
JP2734398B2 (ja) * | 1995-03-30 | 1998-03-30 | 日本電気株式会社 | 出力バッファ回路 |
US5646550A (en) * | 1996-02-22 | 1997-07-08 | Motorola, Inc. | High reliability output buffer for multiple voltage system |
US5854560A (en) * | 1996-11-20 | 1998-12-29 | Ind Tech Res Inst | CMOS output buffer having a high current driving capability with low noise |
US6091259A (en) * | 1997-08-29 | 2000-07-18 | Sun Microsystems, Inc. | Apparatus for accelerating digital signal transitions using a transition acceleration circuit and a transition termination circuit |
US6798237B1 (en) | 2001-08-29 | 2004-09-28 | Altera Corporation | On-chip impedance matching circuit |
US6836144B1 (en) * | 2001-12-10 | 2004-12-28 | Altera Corporation | Programmable series on-chip termination impedance and impedance matching |
US7109744B1 (en) | 2001-12-11 | 2006-09-19 | Altera Corporation | Programmable termination with DC voltage level control |
US6812734B1 (en) | 2001-12-11 | 2004-11-02 | Altera Corporation | Programmable termination with DC voltage level control |
US6888369B1 (en) | 2003-07-17 | 2005-05-03 | Altera Corporation | Programmable on-chip differential termination impedance |
US6859064B1 (en) | 2003-08-20 | 2005-02-22 | Altera Corporation | Techniques for reducing leakage current in on-chip impedance termination circuits |
US6888370B1 (en) | 2003-08-20 | 2005-05-03 | Altera Corporation | Dynamically adjustable termination impedance control techniques |
US7218155B1 (en) | 2005-01-20 | 2007-05-15 | Altera Corporation | Techniques for controlling on-chip termination resistance using voltage range detection |
US7221193B1 (en) | 2005-01-20 | 2007-05-22 | Altera Corporation | On-chip termination with calibrated driver strength |
US7679397B1 (en) | 2005-08-05 | 2010-03-16 | Altera Corporation | Techniques for precision biasing output driver for a calibrated on-chip termination circuit |
US9755644B2 (en) * | 2015-09-30 | 2017-09-05 | Lapis Semiconductor Co., Ltd. | Interface circuit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58142626A (ja) * | 1982-02-18 | 1983-08-24 | Toshiba Corp | 出力バツフア回路 |
JPS60224325A (ja) * | 1984-04-23 | 1985-11-08 | Nec Corp | 3ステ−ト出力回路 |
JPH0720060B2 (ja) * | 1985-08-14 | 1995-03-06 | 株式会社東芝 | 出力回路装置 |
JPS635553A (ja) * | 1986-06-25 | 1988-01-11 | Fujitsu Ltd | バツフア回路 |
US4785201A (en) * | 1986-12-29 | 1988-11-15 | Integrated Device Technology, Inc. | High speed/high drive CMOS output buffer with inductive bounce suppression |
US4829199A (en) * | 1987-07-13 | 1989-05-09 | Ncr Corporation | Driver circuit providing load and time adaptive current |
US4818901A (en) * | 1987-07-20 | 1989-04-04 | Harris Corporation | Controlled switching CMOS output buffer |
-
1988
- 1988-06-27 JP JP63159655A patent/JPH073945B2/ja not_active Expired - Fee Related
-
1989
- 1989-06-27 DE DE8989111677T patent/DE68903141T2/de not_active Expired - Fee Related
- 1989-06-27 EP EP89111677A patent/EP0348894B1/de not_active Expired - Lifetime
- 1989-06-27 US US07/371,865 patent/US4954729A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0348894B1 (de) | 1992-10-07 |
EP0348894A2 (de) | 1990-01-03 |
JPH029224A (ja) | 1990-01-12 |
JPH073945B2 (ja) | 1995-01-18 |
EP0348894A3 (en) | 1990-05-30 |
DE68903141D1 (de) | 1992-11-12 |
US4954729A (en) | 1990-09-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |