DE68926385D1 - Methode und Hardware-Ausführung von komplexen Datentransferbefehlen - Google Patents

Methode und Hardware-Ausführung von komplexen Datentransferbefehlen

Info

Publication number
DE68926385D1
DE68926385D1 DE68926385T DE68926385T DE68926385D1 DE 68926385 D1 DE68926385 D1 DE 68926385D1 DE 68926385 T DE68926385 T DE 68926385T DE 68926385 T DE68926385 T DE 68926385T DE 68926385 D1 DE68926385 D1 DE 68926385D1
Authority
DE
Germany
Prior art keywords
data transfer
complex data
transfer commands
hardware execution
execution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68926385T
Other languages
English (en)
Other versions
DE68926385T2 (de
Inventor
Amy Kwangpih Jen
Patricia Ann Gage
Agnes Yee Ngai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE68926385D1 publication Critical patent/DE68926385D1/de
Publication of DE68926385T2 publication Critical patent/DE68926385T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
DE68926385T 1988-12-29 1989-11-24 Methode und Hardware-Ausführung von komplexen Datentransferbefehlen Expired - Fee Related DE68926385T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29151088A 1988-12-29 1988-12-29

Publications (2)

Publication Number Publication Date
DE68926385D1 true DE68926385D1 (de) 1996-06-05
DE68926385T2 DE68926385T2 (de) 1996-11-07

Family

ID=23120589

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926385T Expired - Fee Related DE68926385T2 (de) 1988-12-29 1989-11-24 Methode und Hardware-Ausführung von komplexen Datentransferbefehlen

Country Status (4)

Country Link
US (1) US5291586A (de)
EP (1) EP0375950B1 (de)
JP (1) JPH02190930A (de)
DE (1) DE68926385T2 (de)

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US5685009A (en) * 1994-07-20 1997-11-04 Exponential Technology, Inc. Shared floating-point registers and register port-pairing in a dual-architecture CPU
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US6189082B1 (en) 1999-01-29 2001-02-13 Neomagic Corp. Burst access of registers at non-consecutive addresses using a mapping control word
US6408380B1 (en) * 1999-05-21 2002-06-18 Institute For The Development Of Emerging Architectures, L.L.C. Execution of an instruction to load two independently selected registers in a single cycle
US6820195B1 (en) * 1999-10-01 2004-11-16 Hitachi, Ltd. Aligning load/store data with big/little endian determined rotation distance control
DE19948100A1 (de) * 1999-10-06 2001-04-12 Infineon Technologies Ag Prozessorsystem
JP3669884B2 (ja) * 1999-11-11 2005-07-13 富士通株式会社 処理装置
EP1311947B1 (de) * 2000-07-14 2011-01-19 MIPS Technologies, Inc. Anweisungsabruf und -absendung in einem multi-thread-system
US7472259B2 (en) * 2000-12-06 2008-12-30 Analog Devices, Inc. Multi-cycle instructions
US7043416B1 (en) * 2001-07-27 2006-05-09 Lsi Logic Corporation System and method for state restoration in a diagnostic module for a high-speed microprocessor
US7372928B1 (en) * 2002-11-15 2008-05-13 Cypress Semiconductor Corporation Method and system of cycle slip framing in a deserializer
US7073019B2 (en) * 2002-12-11 2006-07-04 Cypress Semiconductor Corporation Method and apparatus for assembling non-aligned packet fragments over multiple cycles
US7843922B1 (en) 2002-12-18 2010-11-30 Cypress Semiconductor Corporation Method and apparatus for separation of control and data packets
US7400620B1 (en) 2002-12-19 2008-07-15 Cypress Semiconductor Corporation Method and apparatus for handling small packets
US7324562B1 (en) 2002-12-20 2008-01-29 Cypress Semiconductor Corporation Method and apparatus for introducing differential delay between virtually concatenated tributaries
US7420975B1 (en) 2002-12-20 2008-09-02 Cypress Semiconductor Corporation Method and apparatus for a high-speed frame tagger
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US7493392B1 (en) 2002-12-20 2009-02-17 Cypress Semiconductor Corporation Method and apparatus for assembly of virtually concatenated data
JP6064993B2 (ja) * 2012-03-30 2017-01-25 日本電気株式会社 演算処理装置、その演算処理方法、及び演算処理プログラム

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Also Published As

Publication number Publication date
EP0375950B1 (de) 1996-05-01
JPH02190930A (ja) 1990-07-26
DE68926385T2 (de) 1996-11-07
EP0375950A3 (de) 1991-12-18
EP0375950A2 (de) 1990-07-04
US5291586A (en) 1994-03-01
JPH0583932B2 (de) 1993-11-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee