DE68926783D1 - Paralleler datenprozessor - Google Patents

Paralleler datenprozessor

Info

Publication number
DE68926783D1
DE68926783D1 DE68926783T DE68926783T DE68926783D1 DE 68926783 D1 DE68926783 D1 DE 68926783D1 DE 68926783 T DE68926783 T DE 68926783T DE 68926783 T DE68926783 T DE 68926783T DE 68926783 D1 DE68926783 D1 DE 68926783D1
Authority
DE
Germany
Prior art keywords
data processor
parallel data
parallel
processor
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68926783T
Other languages
English (en)
Other versions
DE68926783T2 (de
Inventor
Wlodzimierz Holsztynski
Richard Benton
W Johnson
Robert Mcnamara
Roger Naeyaert
Douglas Noden
Ronald Schoomaker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Martin Marietta Corp
Original Assignee
Martin Marietta Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Martin Marietta Corp filed Critical Martin Marietta Corp
Publication of DE68926783D1 publication Critical patent/DE68926783D1/de
Application granted granted Critical
Publication of DE68926783T2 publication Critical patent/DE68926783T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
DE68926783T 1988-10-07 1989-09-29 Paralleler datenprozessor Expired - Fee Related DE68926783T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US25471888A 1988-10-07 1988-10-07
PCT/US1989/004281 WO1990004235A1 (en) 1988-10-07 1989-09-29 Parallel data processor

Publications (2)

Publication Number Publication Date
DE68926783D1 true DE68926783D1 (de) 1996-08-08
DE68926783T2 DE68926783T2 (de) 1996-11-28

Family

ID=22965319

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68926783T Expired - Fee Related DE68926783T2 (de) 1988-10-07 1989-09-29 Paralleler datenprozessor

Country Status (6)

Country Link
US (1) US5421019A (de)
EP (1) EP0390907B1 (de)
JP (1) JP2930341B2 (de)
CA (1) CA2000151C (de)
DE (1) DE68926783T2 (de)
WO (1) WO1990004235A1 (de)

Families Citing this family (82)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IE920032A1 (en) * 1991-01-11 1992-07-15 Marconi Gec Ltd Parallel processing apparatus
KR0125623B1 (ko) * 1991-04-09 1998-07-01 세끼자와 다다시 데이타 프로세서 및 데이타 처리방법
US5689719A (en) * 1991-06-28 1997-11-18 Sanyo Electric O., Ltd. Parallel computer system including processing elements
US5717947A (en) * 1993-03-31 1998-02-10 Motorola, Inc. Data processing system and method thereof
JPH076146A (ja) * 1993-06-18 1995-01-10 Fujitsu Ltd 並列データ処理システム
US6073185A (en) * 1993-08-27 2000-06-06 Teranex, Inc. Parallel data processor
US5603046A (en) * 1993-11-02 1997-02-11 Motorola Inc. Method for complex data movement in a multi-processor data processing system
US5742848A (en) * 1993-11-16 1998-04-21 Microsoft Corp. System for passing messages between source object and target object utilizing generic code in source object to invoke any member function of target object by executing the same instructions
EP0728337B1 (de) * 1994-09-13 2000-05-03 Teranex, Inc. Paralleler datenprozessor
GB2293468B (en) * 1994-09-21 1999-09-29 Sony Uk Ltd Data processing systems
US5943242A (en) * 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
US7266725B2 (en) 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
DE19651075A1 (de) 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
US6338106B1 (en) 1996-12-20 2002-01-08 Pact Gmbh I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
DE19654595A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
DE19654593A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
EP1329816B1 (de) 1996-12-27 2011-06-22 Richter, Thomas Verfahren zum selbständigen dynamischen Umladen von Datenflussprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o.dgl.)
DE19654846A1 (de) 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
DE19704044A1 (de) * 1997-02-04 1998-08-13 Pact Inf Tech Gmbh Verfahren zur automatischen Adressgenerierung von Bausteinen innerhalb Clustern aus einer Vielzahl dieser Bausteine
DE19704728A1 (de) 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704742A1 (de) 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
US9092595B2 (en) 1997-10-08 2015-07-28 Pact Xpp Technologies Ag Multiprocessor having associated RAM units
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (de) 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
DE19807872A1 (de) 1998-02-25 1999-08-26 Pact Inf Tech Gmbh Verfahren zur Verwaltung von Konfigurationsdaten in Datenflußprozessoren sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstruktur (FPGAs, DPGAs, o. dgl.
US6173388B1 (en) 1998-04-09 2001-01-09 Teranex Inc. Directly accessing local memories of array processors for improved real-time corner turning processing
US6212628B1 (en) 1998-04-09 2001-04-03 Teranex, Inc. Mesh connected computer
US6185667B1 (en) 1998-04-09 2001-02-06 Teranex, Inc. Input/output support for processing in a mesh connected computer
US6067609A (en) * 1998-04-09 2000-05-23 Teranex, Inc. Pattern generation and shift plane operations for a mesh connected computer
FR2778764B1 (fr) * 1998-05-15 2001-01-05 France Etat Procede de commande d'un reseau de processeurs
WO2000077652A2 (de) 1999-06-10 2000-12-21 Pact Informationstechnologie Gmbh Sequenz-partitionierung auf zellstrukturen
US6532317B2 (en) 2000-04-17 2003-03-11 Polyoptic Technologies, Inc. Optical circuit board
EP2226732A3 (de) 2000-06-13 2016-04-06 PACT XPP Technologies AG Cachehierarchie für einen Multicore-Prozessor
US20040015899A1 (en) * 2000-10-06 2004-01-22 Frank May Method for processing data
JP2004517386A (ja) 2000-10-06 2004-06-10 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト 方法および装置
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US6854117B1 (en) 2000-10-31 2005-02-08 Caspian Networks, Inc. Parallel network processor array
GB2370381B (en) 2000-12-19 2003-12-24 Picochip Designs Ltd Processor architecture
GB2370380B (en) 2000-12-19 2003-12-31 Picochip Designs Ltd Processor architecture
US6990555B2 (en) * 2001-01-09 2006-01-24 Pact Xpp Technologies Ag Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
WO2005045692A2 (en) 2003-08-28 2005-05-19 Pact Xpp Technologies Ag Data processing device and method
US7210129B2 (en) 2001-08-16 2007-04-24 Pact Xpp Technologies Ag Method for translating programs for reconfigurable architectures
US9250908B2 (en) 2001-03-05 2016-02-02 Pact Xpp Technologies Ag Multi-processor bus and cache interconnection system
US9552047B2 (en) 2001-03-05 2017-01-24 Pact Xpp Technologies Ag Multiprocessor having runtime adjustable clock and clock dependent power supply
US9436631B2 (en) 2001-03-05 2016-09-06 Pact Xpp Technologies Ag Chip including memory element storing higher level memory data on a page by page basis
US7581076B2 (en) 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US7844796B2 (en) 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US9141390B2 (en) 2001-03-05 2015-09-22 Pact Xpp Technologies Ag Method of processing data with an array of data processors according to application ID
RU2202123C2 (ru) * 2001-06-06 2003-04-10 Бачериков Геннадий Иванович Параллельная вычислительная система с программируемой архитектурой
US10031733B2 (en) 2001-06-20 2018-07-24 Scientia Sol Mentis Ag Method for processing data
US7657877B2 (en) 2001-06-20 2010-02-02 Pact Xpp Technologies Ag Method for processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7577822B2 (en) 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
AU2003208266A1 (en) 2002-01-19 2003-07-30 Pact Xpp Technologies Ag Reconfigurable processor
JP3902741B2 (ja) * 2002-01-25 2007-04-11 株式会社半導体理工学研究センター 半導体集積回路装置
AU2003214003A1 (en) 2002-02-18 2003-09-09 Pact Xpp Technologies Ag Bus systems and method for reconfiguration
US9170812B2 (en) 2002-03-21 2015-10-27 Pact Xpp Technologies Ag Data processing system having integrated pipelined array data processor
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
WO2004021176A2 (de) 2002-08-07 2004-03-11 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
US7657861B2 (en) 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
US7394284B2 (en) 2002-09-06 2008-07-01 Pact Xpp Technologies Ag Reconfigurable sequencer structure
US7237041B2 (en) * 2002-12-02 2007-06-26 Adc Telecommunications, Inc. Systems and methods for automatic assignment of identification codes to devices
US20040252547A1 (en) * 2003-06-06 2004-12-16 Chengpu Wang Concurrent Processing Memory
US7793040B2 (en) * 2005-06-01 2010-09-07 Microsoft Corporation Content addressable memory architecture
US7451297B2 (en) * 2005-06-01 2008-11-11 Microsoft Corporation Computing system and method that determines current configuration dependent on operand input from another configuration
US7707387B2 (en) 2005-06-01 2010-04-27 Microsoft Corporation Conditional execution via content addressable memory and parallel computing execution model
WO2007082730A1 (de) 2006-01-18 2007-07-26 Pact Xpp Technologies Ag Hardwaredefinitionsverfahren
US8327115B2 (en) * 2006-04-12 2012-12-04 Soft Machines, Inc. Plural matrices of execution units for processing matrices of row dependent instructions in single clock cycle in super or separate mode
WO2010044033A1 (en) * 2008-10-16 2010-04-22 Nxp B.V. System and method for processing data using a matrix of processing units
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
EP2689326B1 (de) 2011-03-25 2022-11-16 Intel Corporation Speicherfragmente zur unterstützung einer codeblockausführung mittels durch partitionierbare engines realisierter virtueller kerne
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
KR20150130510A (ko) 2013-03-15 2015-11-23 소프트 머신즈, 인크. 네이티브 분산된 플래그 아키텍처를 이용하여 게스트 중앙 플래그 아키텍처를 에뮬레이션하는 방법

Family Cites Families (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3287703A (en) * 1962-12-04 1966-11-22 Westinghouse Electric Corp Computer
US3643236A (en) * 1969-12-19 1972-02-15 Ibm Storage having a plurality of simultaneously accessible locations
US3815095A (en) * 1972-08-29 1974-06-04 Texas Instruments Inc General-purpose array processor
US4187551A (en) * 1975-11-21 1980-02-05 Ferranti Limited Apparatus for writing data in unique order into and retrieving same from memory
JPS5352029A (en) * 1976-10-22 1978-05-12 Fujitsu Ltd Arithmetic circuit unit
US4215401A (en) * 1978-09-28 1980-07-29 Environmental Research Institute Of Michigan Cellular digital array processor
US4309755A (en) * 1979-08-22 1982-01-05 Bell Telephone Laboratories, Incorporated Computer input/output arrangement for enabling a simultaneous read/write data transfer
US4314349A (en) * 1979-12-31 1982-02-02 Goodyear Aerospace Corporation Processing element for parallel array processors
US4384273A (en) * 1981-03-20 1983-05-17 Bell Telephone Laboratories, Incorporated Time warp signal recognition processor for matching signal patterns
US4524455A (en) * 1981-06-01 1985-06-18 Environmental Research Inst. Of Michigan Pipeline processor
US4574394A (en) * 1981-06-01 1986-03-04 Environmental Research Institute Of Mi Pipeline processor
US4533993A (en) * 1981-08-18 1985-08-06 National Research Development Corp. Multiple processing cell digital data processor
EP0081309B1 (de) * 1981-12-08 1989-01-04 Unisys Corporation Polyzellare konstante Distanzstruktur für monolithische Halbleiterschaltung sehr hohen Integrationsgrades
US4507726A (en) * 1982-01-26 1985-03-26 Hughes Aircraft Company Array processor architecture utilizing modular elemental processors
DE3374462D1 (en) * 1982-07-21 1987-12-17 Marconi Avionics Multi-dimensional-access memory system
US4489381A (en) * 1982-08-06 1984-12-18 International Business Machines Corporation Hierarchical memories having two ports at each subordinate memory level
US4511967A (en) * 1983-02-15 1985-04-16 Sperry Corporation Simultaneous load and verify of a device control store from a support processor via a scan loop
US4739474A (en) * 1983-03-10 1988-04-19 Martin Marietta Corporation Geometric-arithmetic parallel processor
US4630230A (en) * 1983-04-25 1986-12-16 Cray Research, Inc. Solid state storage device
US4635292A (en) * 1983-12-19 1987-01-06 Matsushita Electric Industrial Co., Ltd. Image processor
US4573116A (en) * 1983-12-20 1986-02-25 Honeywell Information Systems Inc. Multiword data register array having simultaneous read-write capability
GB8401805D0 (en) * 1984-01-24 1984-02-29 Int Computers Ltd Data processing apparatus
US4660155A (en) * 1984-07-23 1987-04-21 Texas Instruments Incorported Single chip video system with separate clocks for memory controller, CRT controller
US4663742A (en) * 1984-10-30 1987-05-05 International Business Machines Corporation Directory memory system having simultaneous write, compare and bypass capabilites
US4623990A (en) * 1984-10-31 1986-11-18 Advanced Micro Devices, Inc. Dual-port read/write RAM with single array
DE3576229D1 (de) * 1984-11-05 1990-04-05 Hughes Aircraft Co Befehlsflussrechner.
CA1233260A (en) * 1985-03-13 1988-02-23 Chuck H. Ngai High performance parallel vector processor having a modified vector register/element processor configuration
US4739476A (en) * 1985-08-01 1988-04-19 General Electric Company Local interconnection scheme for parallel processing architectures
US4720780A (en) * 1985-09-17 1988-01-19 The Johns Hopkins University Memory-linked wavefront array processor
CN1012297B (zh) * 1985-11-13 1991-04-03 奥尔凯托N·V公司 具有内部单元控制和处理的阵列结构
US4769779A (en) * 1985-12-16 1988-09-06 Texas Instruments Incorporated Systolic complex multiplier
US4773038A (en) * 1986-02-24 1988-09-20 Thinking Machines Corporation Method of simulating additional processors in a SIMD parallel processor array
US4933846A (en) * 1987-04-24 1990-06-12 Network Systems Corporation Network communications adapter with dual interleaved memory banks servicing multiple processors

Also Published As

Publication number Publication date
US5421019A (en) 1995-05-30
WO1990004235A1 (en) 1990-04-19
EP0390907B1 (de) 1996-07-03
EP0390907A1 (de) 1990-10-10
JPH03501787A (ja) 1991-04-18
CA2000151A1 (en) 1990-04-07
CA2000151C (en) 1997-12-09
JP2930341B2 (ja) 1999-08-03
DE68926783T2 (de) 1996-11-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee