DE69019654D1 - Logischer Block für programmierbare logische Einrichtungen. - Google Patents

Logischer Block für programmierbare logische Einrichtungen.

Info

Publication number
DE69019654D1
DE69019654D1 DE69019654T DE69019654T DE69019654D1 DE 69019654 D1 DE69019654 D1 DE 69019654D1 DE 69019654 T DE69019654 T DE 69019654T DE 69019654 T DE69019654 T DE 69019654T DE 69019654 D1 DE69019654 D1 DE 69019654D1
Authority
DE
Germany
Prior art keywords
programmable logic
logical block
logic devices
devices
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69019654T
Other languages
English (en)
Other versions
DE69019654T2 (de
Inventor
Randy Charles Steele
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Application granted granted Critical
Publication of DE69019654D1 publication Critical patent/DE69019654D1/de
Publication of DE69019654T2 publication Critical patent/DE69019654T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17772—Structural details of configuration resources for powering on or off
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
DE69019654T 1989-09-29 1990-06-29 Logischer Block für programmierbare logische Einrichtungen. Expired - Fee Related DE69019654T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/414,695 US4975601A (en) 1989-09-29 1989-09-29 User-writable random access memory logic block for programmable logic devices

Publications (2)

Publication Number Publication Date
DE69019654D1 true DE69019654D1 (de) 1995-06-29
DE69019654T2 DE69019654T2 (de) 1995-12-07

Family

ID=23642544

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69019654T Expired - Fee Related DE69019654T2 (de) 1989-09-29 1990-06-29 Logischer Block für programmierbare logische Einrichtungen.

Country Status (5)

Country Link
US (1) US4975601A (de)
EP (1) EP0420389B1 (de)
JP (1) JP3210660B2 (de)
KR (1) KR0171209B1 (de)
DE (1) DE69019654T2 (de)

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US5343406A (en) * 1989-07-28 1994-08-30 Xilinx, Inc. Distributed memory architecture for a configurable logic array and method for using distributed memory
US5128559A (en) * 1989-09-29 1992-07-07 Sgs-Thomson Microelectronics, Inc. Logic block for programmable logic devices
JP2544020B2 (ja) * 1990-11-19 1996-10-16 川崎製鉄株式会社 プログラマブル論理素子
US5255221A (en) * 1991-04-02 1993-10-19 At&T Bell Laboratories Fully configurable versatile field programmable function element
US5237218A (en) * 1991-05-03 1993-08-17 Lattice Semiconductor Corporation Structure and method for multiplexing pins for in-system programming
US20020130681A1 (en) * 1991-09-03 2002-09-19 Cliff Richard G. Programmable logic array integrated circuits
US6759870B2 (en) 1991-09-03 2004-07-06 Altera Corporation Programmable logic array integrated circuits
US5550782A (en) * 1991-09-03 1996-08-27 Altera Corporation Programmable logic array integrated circuits
US5250859A (en) * 1991-09-27 1993-10-05 Kaplinsky Cecil H Low power multifunction logic array
US5319261A (en) * 1992-07-30 1994-06-07 Aptix Corporation Reprogrammable interconnect architecture using fewer storage cells than switches
GB9303084D0 (en) * 1993-02-16 1993-03-31 Inmos Ltd Programmable logic circuit
US5438295A (en) * 1993-06-11 1995-08-01 Altera Corporation Look-up table using multi-level decode
US5815024A (en) * 1993-06-11 1998-09-29 Altera Corporation Look-up table using multi-level decode
USRE38651E1 (en) 1994-05-18 2004-11-09 Altera Corporation Variable depth and width memory device
US5532957A (en) * 1995-01-31 1996-07-02 Texas Instruments Incorporated Field reconfigurable logic/memory array
US5757207A (en) * 1995-03-22 1998-05-26 Altera Corporation Programmable logic array integrated circuit incorporating a first-in first-out memory
US6049223A (en) * 1995-03-22 2000-04-11 Altera Corporation Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory
US5768562A (en) * 1995-09-26 1998-06-16 Altera Corporation Methods for implementing logic in auxiliary components associated with programmable logic array devices
US6107822A (en) 1996-04-09 2000-08-22 Altera Corporation Logic element for a programmable logic integrated circuit
US5977791A (en) * 1996-04-15 1999-11-02 Altera Corporation Embedded memory block with FIFO mode for programmable logic device
US5715197A (en) 1996-07-29 1998-02-03 Xilinx, Inc. Multiport RAM with programmable data port configuration
US6014038A (en) * 1997-03-21 2000-01-11 Lightspeed Semiconductor Corporation Function block architecture for gate array
US6020759A (en) * 1997-03-21 2000-02-01 Altera Corporation Programmable logic array device with random access memory configurable as product terms
US6011744A (en) * 1997-07-16 2000-01-04 Altera Corporation Programmable logic device with multi-port memory
US6034857A (en) 1997-07-16 2000-03-07 Altera Corporation Input/output buffer with overcurrent protection circuit
US6020760A (en) * 1997-07-16 2000-02-01 Altera Corporation I/O buffer circuit with pin multiplexing
US6052327A (en) 1997-10-14 2000-04-18 Altera Corporation Dual-port programmable logic device variable depth and width memory array
US6191998B1 (en) 1997-10-16 2001-02-20 Altera Corporation Programmable logic device memory array circuit having combinable single-port memory arrays
US6288970B1 (en) 1997-10-16 2001-09-11 Altera Corporation Programmable logic device memory array circuit having combinable single-port memory arrays
US6467017B1 (en) 1998-06-23 2002-10-15 Altera Corporation Programmable logic device having embedded dual-port random access memory configurable as single-port memory
US6144573A (en) 1998-06-26 2000-11-07 Altera Corporation Programmable logic devices with improved content addressable memory capabilities
US6453382B1 (en) 1998-11-05 2002-09-17 Altera Corporation Content addressable memory encoded outputs
US6262933B1 (en) 1999-01-29 2001-07-17 Altera Corporation High speed programmable address decoder
JP3616518B2 (ja) * 1999-02-10 2005-02-02 日本電気株式会社 プログラマブルデバイス
US6486702B1 (en) 1999-07-02 2002-11-26 Altera Corporation Embedded memory blocks for programmable logic
US6625794B1 (en) * 2000-11-06 2003-09-23 Xilinx, Inc. Method and system for safe device reconfiguration
US6720796B1 (en) 2001-05-06 2004-04-13 Altera Corporation Multiple size memories in a programmable logic device
US6696856B1 (en) 2001-10-30 2004-02-24 Lightspeed Semiconductor Corporation Function block architecture with variable drive strengths
US7111110B1 (en) * 2002-12-10 2006-09-19 Altera Corporation Versatile RAM for programmable logic device

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4293783A (en) * 1978-11-01 1981-10-06 Massachusetts Institute Of Technology Storage/logic array
US4524430A (en) * 1983-01-11 1985-06-18 Burroughs Corporation Dynamic data re-programmable PLA
US4791602A (en) * 1983-04-14 1988-12-13 Control Data Corporation Soft programmable logic array
EP0170052B1 (de) * 1984-07-02 1992-04-01 Fujitsu Limited Halbleiterschaltungsanordnung in Hauptscheibentechnik
US4754160A (en) * 1984-08-23 1988-06-28 Intersil, Inc. Power supply switching circuit
US4642487A (en) * 1984-09-26 1987-02-10 Xilinx, Inc. Special interconnect for configurable logic array
JPH073838B2 (ja) * 1985-02-28 1995-01-18 株式会社東芝 半導体集積回路
JPS62231495A (ja) * 1986-03-31 1987-10-12 Toshiba Corp 半導体記憶装置
JPS62293598A (ja) * 1986-06-12 1987-12-21 Toshiba Corp 半導体記憶装置
FR2606199B1 (fr) * 1986-11-04 1988-12-09 Eurotechnique Sa Circuit integre du type circuit logique comportant une memoire non volatile programmable electriquement
DE3786539T2 (de) * 1986-12-19 1993-10-28 Fujitsu Ltd Halbleiterspeicher mit Doppelzugriffseinrichtung zur Realisierung eines Lesebetriebs mit hoher Geschwindigkeit.
JPH088304B2 (ja) * 1987-08-19 1996-01-29 富士通株式会社 半導体集積回路装置及びその設計方法
JPS6478023A (en) * 1987-09-18 1989-03-23 Fujitsu Ltd Programmable logic device
JP2541248B2 (ja) * 1987-11-20 1996-10-09 三菱電機株式会社 プログラマブル・ロジック・アレイ
US4847612A (en) * 1988-01-13 1989-07-11 Plug Logic, Inc. Programmable logic device

Also Published As

Publication number Publication date
JPH03166625A (ja) 1991-07-18
EP0420389A1 (de) 1991-04-03
JP3210660B2 (ja) 2001-09-17
KR910007130A (ko) 1991-04-30
DE69019654T2 (de) 1995-12-07
EP0420389B1 (de) 1995-05-24
US4975601A (en) 1990-12-04
KR0171209B1 (ko) 1999-02-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee