DE69033629T2 - Mikroprozessor mit Cache-Speicher - Google Patents

Mikroprozessor mit Cache-Speicher

Info

Publication number
DE69033629T2
DE69033629T2 DE69033629T DE69033629T DE69033629T2 DE 69033629 T2 DE69033629 T2 DE 69033629T2 DE 69033629 T DE69033629 T DE 69033629T DE 69033629 T DE69033629 T DE 69033629T DE 69033629 T2 DE69033629 T2 DE 69033629T2
Authority
DE
Germany
Prior art keywords
microprocessor
cache memory
cache
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69033629T
Other languages
English (en)
Other versions
DE69033629D1 (de
Inventor
Rikako Kato
Hiroyuki Takai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69033629D1 publication Critical patent/DE69033629D1/de
Application granted granted Critical
Publication of DE69033629T2 publication Critical patent/DE69033629T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0891Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using clearing, invalidating or resetting means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
DE69033629T 1990-01-22 1990-12-31 Mikroprozessor mit Cache-Speicher Expired - Fee Related DE69033629T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010667A JPH0748190B2 (ja) 1990-01-22 1990-01-22 キャッシュメモリ内蔵マイクロプロセッサ

Publications (2)

Publication Number Publication Date
DE69033629D1 DE69033629D1 (de) 2000-10-19
DE69033629T2 true DE69033629T2 (de) 2001-04-19

Family

ID=11756595

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69033629T Expired - Fee Related DE69033629T2 (de) 1990-01-22 1990-12-31 Mikroprozessor mit Cache-Speicher

Country Status (5)

Country Link
US (1) US5363496A (de)
EP (1) EP0438808B1 (de)
JP (1) JPH0748190B2 (de)
KR (1) KR930009669B1 (de)
DE (1) DE69033629T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB9118312D0 (en) * 1991-08-24 1991-10-09 Motorola Inc Real time cache implemented by dual purpose on-chip memory
JPH06195264A (ja) * 1992-12-22 1994-07-15 Nec Corp キャッシュ一致処理装置
JPH06282488A (ja) * 1993-03-25 1994-10-07 Mitsubishi Electric Corp キャッシュ記憶装置
JPH07191907A (ja) * 1993-11-09 1995-07-28 Internatl Business Mach Corp <Ibm> キャッシュ・メモリ・アレイに記憶されるデータの有効ステータスを効率的に管理するための方法及びシステム
US5829052A (en) * 1994-12-28 1998-10-27 Intel Corporation Method and apparatus for managing memory accesses in a multiple multiprocessor cluster system
US5778431A (en) * 1995-12-19 1998-07-07 Advanced Micro Devices, Inc. System and apparatus for partially flushing cache memory
US5974509A (en) * 1996-05-01 1999-10-26 Sun Microsystems, Inc. Method for purging unused data from a cache memory
US5778432A (en) * 1996-07-01 1998-07-07 Motorola, Inc. Method and apparatus for performing different cache replacement algorithms for flush and non-flush operations in response to a cache flush control bit register
DE69732691T2 (de) * 1997-05-26 2006-05-04 Bull S.A. System zur selektiven und gemeinsamen Ungültigkeitserklärung von Einträgen eines Adressencachespeichers und eines Datencachespeichers, welche durch ein oder mehrere Adressencacheungültigkeitserklärungen verursacht wird
JPH1153260A (ja) * 1997-08-06 1999-02-26 Nec Corp キャッシュメモリー内蔵半導体装置
DE19913732A1 (de) * 1999-03-26 2000-09-28 Lohmann Therapie Syst Lts Nikotin-TTS mit einem Zusatz von Monoterpenketonen
US6691210B2 (en) 2000-12-29 2004-02-10 Stmicroelectronics, Inc. Circuit and method for hardware-assisted software flushing of data and instruction caches
WO2010049833A1 (en) 2008-10-28 2010-05-06 Nxp B.V. Data processing circuit with cache and interface for a detachable device
US8364899B2 (en) * 2010-06-24 2013-01-29 International Business Machines Corporation User-controlled targeted cache purge
US9026829B2 (en) * 2010-09-25 2015-05-05 Intel Corporation Package level power state optimization
US10530883B2 (en) * 2014-02-18 2020-01-07 Fastly Inc. Data purge distribution and coherency
US11860789B2 (en) * 2022-03-21 2024-01-02 International Business Machines Corporation Reduced simulation verification complexity of cache purge

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3979726A (en) * 1974-04-10 1976-09-07 Honeywell Information Systems, Inc. Apparatus for selectively clearing a cache store in a processor having segmentation and paging
US4481573A (en) * 1980-11-17 1984-11-06 Hitachi, Ltd. Shared virtual address translation unit for a multiprocessor system
JPS60500187A (ja) * 1982-12-30 1985-02-07 インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン データ処理システム
US4701844A (en) * 1984-03-30 1987-10-20 Motorola Computer Systems, Inc. Dual cache for independent prefetch and execution units
JP2539357B2 (ja) * 1985-03-15 1996-10-02 株式会社日立製作所 デ−タ処理装置
US4713755A (en) * 1985-06-28 1987-12-15 Hewlett-Packard Company Cache memory consistency control with explicit software instructions
US5091846A (en) * 1986-10-03 1992-02-25 Intergraph Corporation Cache providing caching/non-caching write-through and copyback modes for virtual addresses and including bus snooping to maintain coherency
US4811215A (en) * 1986-12-12 1989-03-07 Intergraph Corporation Instruction execution accelerator for a pipelined digital machine with virtual memory
DE3740834A1 (de) * 1987-01-22 1988-08-04 Nat Semiconductor Corp Aufrechterhaltung der kohaerenz zwischen einem mikroprozessorenintegrierten cache-speicher und einem externen speicher
GB2210480B (en) * 1987-10-02 1992-01-29 Sun Microsystems Inc Flush support
JPH01175650A (ja) * 1987-12-29 1989-07-12 Matsushita Electric Ind Co Ltd キャッシュメモリ
IT1216086B (it) * 1988-03-15 1990-02-22 Honeywell Bull Spa Memoria tampone ad indirizzamento pseudo virtuale.
US5029070A (en) * 1988-08-25 1991-07-02 Edge Computer Corporation Coherent cache structures and methods
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
US5095428A (en) * 1989-01-04 1992-03-10 Compaq Computer Corporation Cache flush request circuit flushes the cache if input/output space write operation and circuit board response are occurring concurrently
US5133058A (en) * 1989-09-18 1992-07-21 Sun Microsystems, Inc. Page-tagging translation look-aside buffer for a computer memory system

Also Published As

Publication number Publication date
JPH0748190B2 (ja) 1995-05-24
US5363496A (en) 1994-11-08
DE69033629D1 (de) 2000-10-19
EP0438808B1 (de) 2000-09-13
KR930009669B1 (ko) 1993-10-08
EP0438808A2 (de) 1991-07-31
KR910014817A (ko) 1991-08-31
EP0438808A3 (en) 1992-06-17
JPH03216745A (ja) 1991-09-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee