DE69107354D1 - Logikschaltung einer identitätskodenverarbeitenden SCSI-Busschnittstelle. - Google Patents

Logikschaltung einer identitätskodenverarbeitenden SCSI-Busschnittstelle.

Info

Publication number
DE69107354D1
DE69107354D1 DE69107354T DE69107354T DE69107354D1 DE 69107354 D1 DE69107354 D1 DE 69107354D1 DE 69107354 T DE69107354 T DE 69107354T DE 69107354 T DE69107354 T DE 69107354T DE 69107354 D1 DE69107354 D1 DE 69107354D1
Authority
DE
Germany
Prior art keywords
logic circuit
bus interface
identity code
code processing
scsi bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69107354T
Other languages
English (en)
Other versions
DE69107354T2 (de
Inventor
Jae Boo Choi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
Original Assignee
Gold Star Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gold Star Co Ltd filed Critical Gold Star Co Ltd
Publication of DE69107354D1 publication Critical patent/DE69107354D1/de
Application granted granted Critical
Publication of DE69107354T2 publication Critical patent/DE69107354T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
DE69107354T 1990-06-30 1991-06-29 Logikschaltung einer identitätskodenverarbeitenden SCSI-Busschnittstelle. Expired - Fee Related DE69107354T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900009799A KR920001351A (ko) 1990-06-30 1990-06-30 Id 처리전용 scsi 버스 인터페이스 로직

Publications (2)

Publication Number Publication Date
DE69107354D1 true DE69107354D1 (de) 1995-03-23
DE69107354T2 DE69107354T2 (de) 1995-06-14

Family

ID=19300667

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69107354T Expired - Fee Related DE69107354T2 (de) 1990-06-30 1991-06-29 Logikschaltung einer identitätskodenverarbeitenden SCSI-Busschnittstelle.

Country Status (4)

Country Link
US (1) US5247622A (de)
EP (1) EP0464729B1 (de)
KR (1) KR920001351A (de)
DE (1) DE69107354T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05265947A (ja) * 1992-02-19 1993-10-15 Nec Corp Scsiコントローラ
US5611056A (en) * 1994-08-31 1997-03-11 Unisys Corporation Method for controlling the expansion of connections to a SCSI bus
DE69426625T2 (de) * 1994-09-28 2001-09-06 St Microelectronics Srl Steuerungseinheit für Unterbrechungskanäle in einem Mikrokontroller
US5548788A (en) * 1994-10-27 1996-08-20 Emc Corporation Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory
US5613076A (en) * 1994-11-30 1997-03-18 Unisys Corporation System and method for providing uniform access to a SCSI bus by altering the arbitration phase associated with the SCSI bus
EP0717362A1 (de) * 1994-12-13 1996-06-19 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Ein Zugriffsarbiter vor einen MCA-Kanal für mehrere Steuerungseinheiten mit zentralisierter Arbitrierung-Prozessorschnittstelle, insbesondere (LAN und SCSI) Steuerungseinheiten
US7343430B2 (en) * 2004-04-29 2008-03-11 Hitachi Global Storage Technologies Netherlands B.V. Methods and apparatus for improving data integrity for small computer system interface (SCSI) devices
US10146608B2 (en) 2015-04-06 2018-12-04 Rambus Inc. Memory module register access

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4237534A (en) * 1978-11-13 1980-12-02 Motorola, Inc. Bus arbiter
FR2490434B1 (fr) * 1980-09-12 1988-03-18 Quinquis Jean Paul Dispositif de resolution des conflits d'acces et d'allocation d'une liaison de type bus interconnectant un ensemble de processeurs non hierarchises
US4402040A (en) * 1980-09-24 1983-08-30 Raytheon Company Distributed bus arbitration method and apparatus
US4814974A (en) * 1982-07-02 1989-03-21 American Telephone And Telegraph Company, At&T Bell Laboratories Programmable memory-based arbitration system for implementing fixed and flexible priority arrangements
EP0120172B1 (de) * 1983-03-29 1988-02-03 International Business Machines Corporation Businterfacevorrichtung für ein Datenverarbeitungssystem
US5083261A (en) * 1983-11-03 1992-01-21 Motorola, Inc. Dynamically alterable interrupt priority circuit
US4941086A (en) * 1984-02-02 1990-07-10 International Business Machines Corporation Program controlled bus arbitration for a distributed array processing system
US4975829A (en) * 1986-09-22 1990-12-04 At&T Bell Laboratories Communication interface protocol
US5072420A (en) * 1989-03-16 1991-12-10 Western Digital Corporation FIFO control architecture and method for buffer memory access arbitration
JPH03137757A (ja) * 1989-10-24 1991-06-12 Mitsubishi Electric Corp 優先順位制御方式
US5081578A (en) * 1989-11-03 1992-01-14 Ncr Corporation Arbitration apparatus for a parallel bus

Also Published As

Publication number Publication date
EP0464729B1 (de) 1995-02-15
DE69107354T2 (de) 1995-06-14
EP0464729A3 (en) 1992-08-19
KR920001351A (ko) 1992-01-30
EP0464729A2 (de) 1992-01-08
US5247622A (en) 1993-09-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee