DE69124789T2 - Apparat zur Verbesserung des Gegensicherungs-Programmierertrags und zur Reduktion der Gegensicherungs-Programmierzeit - Google Patents
Apparat zur Verbesserung des Gegensicherungs-Programmierertrags und zur Reduktion der Gegensicherungs-ProgrammierzeitInfo
- Publication number
- DE69124789T2 DE69124789T2 DE69124789T DE69124789T DE69124789T2 DE 69124789 T2 DE69124789 T2 DE 69124789T2 DE 69124789 T DE69124789 T DE 69124789T DE 69124789 T DE69124789 T DE 69124789T DE 69124789 T2 DE69124789 T2 DE 69124789T2
- Authority
- DE
- Germany
- Prior art keywords
- counter
- fuse programming
- approach
- improving
- reducing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/638,517 US5130777A (en) | 1991-01-04 | 1991-01-04 | Apparatus for improving antifuse programming yield and reducing antifuse programming time |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69124789D1 DE69124789D1 (de) | 1997-04-03 |
DE69124789T2 true DE69124789T2 (de) | 1997-06-12 |
Family
ID=24560363
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69124789T Expired - Fee Related DE69124789T2 (de) | 1991-01-04 | 1991-12-23 | Apparat zur Verbesserung des Gegensicherungs-Programmierertrags und zur Reduktion der Gegensicherungs-Programmierzeit |
Country Status (5)
Country | Link |
---|---|
US (1) | US5130777A (de) |
EP (1) | EP0493957B1 (de) |
JP (1) | JPH05136272A (de) |
AT (1) | ATE149266T1 (de) |
DE (1) | DE69124789T2 (de) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2535084B2 (ja) * | 1990-02-19 | 1996-09-18 | シャープ株式会社 | 半導体装置の製造方法 |
US5528600A (en) * | 1991-01-28 | 1996-06-18 | Actel Corporation | Testability circuits for logic arrays |
US5302546A (en) * | 1991-07-31 | 1994-04-12 | Quicklogic Corporation | Programming of antifuses |
US5327024A (en) * | 1992-07-02 | 1994-07-05 | Quicklogic Corporation | Field programmable antifuse device and programming method therefor |
US5544070A (en) * | 1991-07-31 | 1996-08-06 | Quicklogic Corporation | Programmed programmable device and method for programming antifuses of a programmable device |
US5293133A (en) * | 1992-08-27 | 1994-03-08 | Quicklogic Corporation | Method of determining an electrical characteristic of an antifuse and apparatus therefor |
JPH06318864A (ja) * | 1993-05-07 | 1994-11-15 | Toshiba Corp | フィールドプログラマブルゲートアレイ |
US5550404A (en) * | 1993-05-20 | 1996-08-27 | Actel Corporation | Electrically programmable antifuse having stair aperture |
US5371414A (en) * | 1993-05-26 | 1994-12-06 | Actel Corporation | Simultaneous multiple antifuse programming method |
US5379250A (en) * | 1993-08-20 | 1995-01-03 | Micron Semiconductor, Inc. | Zener programmable read only memory |
US5414364A (en) * | 1993-09-08 | 1995-05-09 | Actel Corporation | Apparatus and method for measuring programmed antifuse resistance |
US5424655A (en) * | 1994-05-20 | 1995-06-13 | Quicklogic Corporation | Programmable application specific integrated circuit employing antifuses and methods therefor |
US5485105A (en) * | 1994-08-01 | 1996-01-16 | Texas Instruments Inc. | Apparatus and method for programming field programmable arrays |
US5495181A (en) * | 1994-12-01 | 1996-02-27 | Quicklogic Corporation | Integrated circuit facilitating simultaneous programming of multiple antifuses |
US5552720A (en) * | 1994-12-01 | 1996-09-03 | Quicklogic Corporation | Method for simultaneous programming of multiple antifuses |
US5741720A (en) * | 1995-10-04 | 1998-04-21 | Actel Corporation | Method of programming an improved metal-to-metal via-type antifuse |
US5661412A (en) * | 1995-10-10 | 1997-08-26 | Quicklogic Corporation | Reducing programming time of a field programmable gate array employing antifuses |
US5851882A (en) | 1996-05-06 | 1998-12-22 | Micron Technology, Inc. | ZPROM manufacture and design and methods for forming thin structures using spacers as an etching mask |
US5896041A (en) * | 1996-05-28 | 1999-04-20 | Micron Technology, Inc. | Method and apparatus for programming anti-fuses using internally generated programming voltage |
US5841723A (en) * | 1996-05-28 | 1998-11-24 | Micron Technology, Inc. | Method and apparatus for programming anti-fuses using an isolated well programming circuit |
US5742555A (en) | 1996-08-20 | 1998-04-21 | Micron Technology, Inc. | Method of anti-fuse repair |
GB2318228B (en) * | 1996-10-09 | 2000-08-09 | Ericsson Telefon Ab L M | Trimming circuit |
US5859562A (en) * | 1996-12-24 | 1999-01-12 | Actel Corporation | Programming circuit for antifuses using bipolar and SCR devices |
US6021079A (en) * | 1998-05-13 | 2000-02-01 | Richard Mann | Fast, low cost method of developing code for contact programmable ROMs |
US6107165A (en) * | 1998-08-13 | 2000-08-22 | Quicklogic Corporation | Metal-to-metal antifuse having improved barrier layer |
US5955751A (en) * | 1998-08-13 | 1999-09-21 | Quicklogic Corporation | Programmable device having antifuses without programmable material edges and/or corners underneath metal |
US6836000B1 (en) * | 2000-03-01 | 2004-12-28 | Micron Technology, Inc. | Antifuse structure and method of use |
JP4663094B2 (ja) | 2000-10-13 | 2011-03-30 | 株式会社半導体エネルギー研究所 | 半導体装置 |
US7211843B2 (en) * | 2002-04-04 | 2007-05-01 | Broadcom Corporation | System and method for programming a memory cell |
US7138685B2 (en) * | 2002-12-11 | 2006-11-21 | International Business Machines Corporation | Vertical MOSFET SRAM cell |
US6868022B2 (en) * | 2003-03-28 | 2005-03-15 | Matrix Semiconductor, Inc. | Redundant memory structure using bad bit pointers |
US7277336B2 (en) * | 2004-12-28 | 2007-10-02 | Sandisk 3D Llc | Method and apparatus for improving yield in semiconductor devices by guaranteeing health of redundancy information |
US7212454B2 (en) * | 2005-06-22 | 2007-05-01 | Sandisk 3D Llc | Method and apparatus for programming a memory array |
US7958390B2 (en) * | 2007-05-15 | 2011-06-07 | Sandisk Corporation | Memory device for repairing a neighborhood of rows in a memory array using a patch table |
US7966518B2 (en) * | 2007-05-15 | 2011-06-21 | Sandisk Corporation | Method for repairing a neighborhood of rows in a memory array using a patch table |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3582908A (en) * | 1969-03-10 | 1971-06-01 | Bell Telephone Labor Inc | Writing a read-only memory while protecting nonselected elements |
US4507757A (en) * | 1982-03-23 | 1985-03-26 | Texas Instruments Incorporated | Avalanche fuse element in programmable memory |
JPS592291A (ja) * | 1982-06-28 | 1984-01-07 | Fujitsu Ltd | プログラマブル・リ−ドオンリ・メモリ装置 |
JPS59105354A (ja) * | 1982-12-09 | 1984-06-18 | Toshiba Corp | 半導体装置 |
US4569121A (en) * | 1983-03-07 | 1986-02-11 | Signetics Corporation | Method of fabricating a programmable read-only memory cell incorporating an antifuse utilizing deposition of amorphous semiconductor layer |
US4569120A (en) * | 1983-03-07 | 1986-02-11 | Signetics Corporation | Method of fabricating a programmable read-only memory cell incorporating an antifuse utilizing ion implantation |
JPH0666433B2 (ja) * | 1984-02-09 | 1994-08-24 | エヌ・シー・アール・インターナショナル・インコーポレイテッド | 電気的にプログラム可能な読出専用メモリ・セル |
US4638243A (en) * | 1985-06-05 | 1987-01-20 | Monolithic Memories, Inc. | Short detector for fusible link array using single reference fuse |
GB2222024B (en) * | 1988-08-18 | 1992-02-19 | Stc Plc | Improvements in integrated circuits |
US4914055A (en) * | 1989-08-24 | 1990-04-03 | Advanced Micro Devices, Inc. | Semiconductor antifuse structure and method |
-
1991
- 1991-01-04 US US07/638,517 patent/US5130777A/en not_active Expired - Lifetime
- 1991-12-23 DE DE69124789T patent/DE69124789T2/de not_active Expired - Fee Related
- 1991-12-23 EP EP91311941A patent/EP0493957B1/de not_active Expired - Lifetime
- 1991-12-23 AT AT91311941T patent/ATE149266T1/de not_active IP Right Cessation
- 1991-12-27 JP JP35871491A patent/JPH05136272A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH05136272A (ja) | 1993-06-01 |
EP0493957A1 (de) | 1992-07-08 |
US5130777A (en) | 1992-07-14 |
DE69124789D1 (de) | 1997-04-03 |
EP0493957B1 (de) | 1997-02-26 |
ATE149266T1 (de) | 1997-03-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |