DE69124840T2 - Speicherplatzzuordnung für mehrere Speicherbausteine - Google Patents

Speicherplatzzuordnung für mehrere Speicherbausteine

Info

Publication number
DE69124840T2
DE69124840T2 DE69124840T DE69124840T DE69124840T2 DE 69124840 T2 DE69124840 T2 DE 69124840T2 DE 69124840 T DE69124840 T DE 69124840T DE 69124840 T DE69124840 T DE 69124840T DE 69124840 T2 DE69124840 T2 DE 69124840T2
Authority
DE
Germany
Prior art keywords
memory modules
several memory
space allocation
allocation
space
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69124840T
Other languages
English (en)
Other versions
DE69124840D1 (de
Inventor
Thomas Alfred Rohwer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Electronics Inc
Original Assignee
Sony Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Electronics Inc filed Critical Sony Electronics Inc
Publication of DE69124840D1 publication Critical patent/DE69124840D1/de
Application granted granted Critical
Publication of DE69124840T2 publication Critical patent/DE69124840T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/907—Television signal recording using static stores, e.g. storage tubes or semiconductor memories
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/91—Television signal processing therefor
    • H04N5/93—Regeneration of the television signal or of selected parts thereof
    • H04N5/937—Regeneration of the television signal or of selected parts thereof by assembling picture element blocks in an intermediate store
DE69124840T 1990-05-31 1991-05-30 Speicherplatzzuordnung für mehrere Speicherbausteine Expired - Lifetime DE69124840T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/531,001 US5241663A (en) 1990-05-31 1990-05-31 Hierarchically pairing memory blocks based upon relative storage capacities and simultaneously accessing each memory block within the paired memory blocks

Publications (2)

Publication Number Publication Date
DE69124840D1 DE69124840D1 (de) 1997-04-10
DE69124840T2 true DE69124840T2 (de) 1997-06-19

Family

ID=24115861

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69124840T Expired - Lifetime DE69124840T2 (de) 1990-05-31 1991-05-30 Speicherplatzzuordnung für mehrere Speicherbausteine

Country Status (4)

Country Link
US (1) US5241663A (de)
EP (1) EP0459800B1 (de)
JP (1) JPH04227386A (de)
DE (1) DE69124840T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2160560A1 (en) * 1993-04-16 1994-10-27 Daniel F. Cutter Video peripheral for a computer
US5596702A (en) * 1993-04-16 1997-01-21 International Business Machines Corporation Method and system for dynamically sharing user interface displays among a plurality of application program
US6006020A (en) * 1993-04-16 1999-12-21 Media 100 Inc. Video peripheral circuitry exercising bus master control over a bus of a host computer
JP3220328B2 (ja) * 1994-06-01 2001-10-22 株式会社ソニー・コンピュータエンタテインメント ビデオゲーム機
DE4445803A1 (de) * 1994-12-21 1996-06-27 Siemens Ag Fernsehgerät
FR2732134B1 (fr) * 1995-03-23 1997-06-06 Suisse Electronique Microtech Systeme informatique avec memoires hierarchisees
US5915265A (en) * 1995-12-22 1999-06-22 Intel Corporation Method and apparatus for dynamically allocating and resizing the dedicated memory in a shared memory buffer architecture system
US5715207A (en) * 1996-03-28 1998-02-03 International Business Machines Corporation Memory presence and type detection using multiplexed memory line function
US5860134A (en) * 1996-03-28 1999-01-12 International Business Machines Corporation Memory system with memory presence and type detection using multiplexed memory line function
US6161167A (en) * 1997-06-27 2000-12-12 Advanced Micro Devices, Inc. Fully associate cache employing LRU groups for cache replacement and mechanism for selecting an LRU group
JPH11110915A (ja) 1997-09-30 1999-04-23 Sony Corp 信号記録再生装置及び方法
JP4196419B2 (ja) * 1997-11-05 2008-12-17 ソニー株式会社 データ送受信システム、データ受信装置及びデータ送受信方法
US6223268B1 (en) 1999-01-08 2001-04-24 Sony Corporation System and method for writing specific bytes in a wide-word memory
US6323868B1 (en) 1999-01-27 2001-11-27 Sony Corporation System and method for frame and field memory access in a wide-word memory
US6848024B1 (en) 2000-08-07 2005-01-25 Broadcom Corporation Programmably disabling one or more cache entries
US6748492B1 (en) 2000-08-07 2004-06-08 Broadcom Corporation Deterministic setting of replacement policy in a cache through way selection
US6732234B1 (en) * 2000-08-07 2004-05-04 Broadcom Corporation Direct access mode for a cache
US6748495B2 (en) 2001-05-15 2004-06-08 Broadcom Corporation Random generator
US7266587B2 (en) * 2002-05-15 2007-09-04 Broadcom Corporation System having interfaces, switch, and memory bridge for CC-NUMA operation
JP5032120B2 (ja) * 2003-10-14 2012-09-26 バーセオン 分子を区分するための方法および装置
EP3223515A1 (de) * 2016-03-21 2017-09-27 Thomson Licensing Verfahren zur prüfung der leistung einer speichervorrichtung und entsprechende vorrichtung

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE31318E (en) * 1973-09-10 1983-07-19 Computer Automation, Inc. Automatic modular memory address allocation system
CA1102007A (en) * 1979-05-15 1981-05-26 Prem L. Sood Duplicated memory system having status indication
GB2098021B (en) * 1981-05-06 1985-06-19 Sony Corp Digital television apparatuses
US4432055A (en) * 1981-09-29 1984-02-14 Honeywell Information Systems Inc. Sequential word aligned addressing apparatus
US4511964A (en) * 1982-11-12 1985-04-16 Hewlett-Packard Company Dynamic physical memory mapping and management of independent programming environments
US4654787A (en) * 1983-07-29 1987-03-31 Hewlett-Packard Company Apparatus for locating memory modules having different sizes within a memory space
JPS60157646A (ja) * 1984-01-27 1985-08-17 Mitsubishi Electric Corp メモリバンク切換装置
JPS62194563A (ja) * 1986-02-21 1987-08-27 Hitachi Ltd バツフア記憶装置
US4908789A (en) * 1987-04-01 1990-03-13 International Business Machines Corporation Method and system for automatically assigning memory modules of different predetermined capacities to contiguous segments of a linear address range
GB2204721B (en) * 1987-05-11 1991-10-23 Apple Computer Method and apparatus for determining available memory size
US4980850A (en) * 1987-05-14 1990-12-25 Digital Equipment Corporation Automatic sizing memory system with multiplexed configuration signals at memory modules
US4772948A (en) * 1987-10-26 1988-09-20 Tektronix, Inc. Method of low cost self-test in a video display system system
US4780755A (en) * 1987-10-26 1988-10-25 Tektronix, Inc. Frame buffer self-test
US5093809A (en) * 1989-04-21 1992-03-03 Siemens Aktiengesellschaft Static memory having pipeline registers

Also Published As

Publication number Publication date
DE69124840D1 (de) 1997-04-10
US5241663A (en) 1993-08-31
EP0459800B1 (de) 1997-03-05
EP0459800A3 (en) 1993-02-10
JPH04227386A (ja) 1992-08-17
EP0459800A2 (de) 1991-12-04

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Legal Events

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8364 No opposition during term of opposition