DE69126047D1 - Schaltkreis zur Serialisierung und Deserialisierung - Google Patents

Schaltkreis zur Serialisierung und Deserialisierung

Info

Publication number
DE69126047D1
DE69126047D1 DE69126047T DE69126047T DE69126047D1 DE 69126047 D1 DE69126047 D1 DE 69126047D1 DE 69126047 T DE69126047 T DE 69126047T DE 69126047 T DE69126047 T DE 69126047T DE 69126047 D1 DE69126047 D1 DE 69126047D1
Authority
DE
Germany
Prior art keywords
deserialization
serialization
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69126047T
Other languages
English (en)
Other versions
DE69126047T2 (de
Inventor
Philippe Chaisemartin
Alain Artieri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Application granted granted Critical
Publication of DE69126047D1 publication Critical patent/DE69126047D1/de
Publication of DE69126047T2 publication Critical patent/DE69126047T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/76Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
    • G06F7/78Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data for changing the order of data flow, e.g. matrix transposition or LIFO buffers; Overflow or underflow handling therefor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00Parallel/series conversion or vice versa
DE69126047T 1990-01-26 1991-01-22 Schaltkreis zur Serialisierung und Deserialisierung Expired - Fee Related DE69126047T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9001099A FR2657739B1 (fr) 1990-01-26 1990-01-26 Serialiseur/deserialiseur.

Publications (2)

Publication Number Publication Date
DE69126047D1 true DE69126047D1 (de) 1997-06-19
DE69126047T2 DE69126047T2 (de) 1997-08-28

Family

ID=9393252

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69126047T Expired - Fee Related DE69126047T2 (de) 1990-01-26 1991-01-22 Schaltkreis zur Serialisierung und Deserialisierung

Country Status (5)

Country Link
US (1) US5101202A (de)
EP (1) EP0439412B1 (de)
JP (1) JPH0722964A (de)
DE (1) DE69126047T2 (de)
FR (1) FR2657739B1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235782A (ja) * 1992-02-19 1993-09-10 Fujitsu Ltd 垂直データ・水平データ交換方法及び回路
FI93676C (fi) * 1993-04-13 1995-05-10 Nokia Mobile Phones Ltd Kytkentä deinterliivauksen toteuttamiseksi hakulaitejärjestelmässä
SE518865C2 (sv) 1998-12-22 2002-12-03 Switchcore Ab Anordning och metod för omvandling av data i seriellt format till parallellt format och vice versa
TW468269B (en) * 1999-01-28 2001-12-11 Semiconductor Energy Lab Serial-to-parallel conversion circuit, and semiconductor display device employing the same
US9071256B1 (en) * 2014-06-23 2015-06-30 Cadence Design Systems, Inc. Method for link resets in a SerDes system

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2905928A (en) * 1955-09-08 1959-09-22 Bell Telephone Labor Inc Ferroelectric storage array
GB1220680A (en) * 1967-10-11 1971-01-27 Automatic Telephone & Elect Improvements relating to data transmission systems
FR2278114A1 (fr) * 1974-07-10 1976-02-06 Materiel Telephonique Dispositif de transposition pour systeme numerique
US3965462A (en) * 1975-05-09 1976-06-22 The United States Of America As Represented By The Secretary Of The Air Force Serpentine charge-coupled-device memory circuit
US4103347A (en) * 1976-10-29 1978-07-25 Texas Instruments Incorporated Zig-zag sps ccd memory
US4303992A (en) * 1980-05-13 1981-12-01 International Business Machines Corporation Serial parallel charge coupled device employing a gate splitting device
US4775990A (en) * 1984-01-18 1988-10-04 Sharp Kabushiki Kaisha Serial-to-parallel converter
JPS6238075A (ja) * 1985-08-13 1987-02-19 Fuji Xerox Co Ltd 行列デ−タの転置処理装置
US4760543A (en) * 1986-11-10 1988-07-26 American Telephone And Telegraph Company, At&T Bell Laboratories Orthogonal transform processor
FR2617621B1 (fr) * 1987-07-03 1989-12-01 Thomson Semiconducteurs Memoire de transposition pour circuit de traitement de donnees
US4901076A (en) * 1987-10-29 1990-02-13 International Business Machines Corporation Circuit for converting between serial and parallel data streams by high speed addressing

Also Published As

Publication number Publication date
FR2657739A1 (fr) 1991-08-02
EP0439412A1 (de) 1991-07-31
DE69126047T2 (de) 1997-08-28
EP0439412B1 (de) 1997-05-14
FR2657739B1 (fr) 1992-05-07
JPH0722964A (ja) 1995-01-24
US5101202A (en) 1992-03-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee