DE69217707D1 - Verfahren und Gerät zur Prüfung eines nichtflüchtigen Speichers - Google Patents

Verfahren und Gerät zur Prüfung eines nichtflüchtigen Speichers

Info

Publication number
DE69217707D1
DE69217707D1 DE69217707T DE69217707T DE69217707D1 DE 69217707 D1 DE69217707 D1 DE 69217707D1 DE 69217707 T DE69217707 T DE 69217707T DE 69217707 T DE69217707 T DE 69217707T DE 69217707 D1 DE69217707 D1 DE 69217707D1
Authority
DE
Germany
Prior art keywords
address space
nvm
testing
nvms
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69217707T
Other languages
English (en)
Other versions
DE69217707T2 (de
Inventor
Arno Muller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pitney Bowes Inc
Original Assignee
Pitney Bowes Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pitney Bowes Inc filed Critical Pitney Bowes Inc
Publication of DE69217707D1 publication Critical patent/DE69217707D1/de
Application granted granted Critical
Publication of DE69217707T2 publication Critical patent/DE69217707T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
DE69217707T 1991-05-03 1992-05-04 Verfahren und Gerät zur Prüfung eines nichtflüchtigen Speichers Expired - Fee Related DE69217707T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US69562491A 1991-05-03 1991-05-03

Publications (2)

Publication Number Publication Date
DE69217707D1 true DE69217707D1 (de) 1997-04-10
DE69217707T2 DE69217707T2 (de) 1997-07-31

Family

ID=24793783

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69217707T Expired - Fee Related DE69217707T2 (de) 1991-05-03 1992-05-04 Verfahren und Gerät zur Prüfung eines nichtflüchtigen Speichers

Country Status (4)

Country Link
US (1) US5502813A (de)
EP (1) EP0513607B1 (de)
CA (1) CA2067466C (de)
DE (1) DE69217707T2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102116834B (zh) * 2010-01-05 2013-04-24 上海华虹Nec电子有限公司 用于nvm测试中不同品种参数之间坐标的对应方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4916623A (en) * 1982-01-29 1990-04-10 Pitney Bowes Inc. Electronic postage meter having redundant memory
US4578774A (en) * 1983-07-18 1986-03-25 Pitney Bowes Inc. System for limiting access to non-volatile memory in electronic postage meters
US4998203A (en) * 1985-03-12 1991-03-05 Digiulio Peter C Postage meter with a non-volatile memory security circuit
US4742469A (en) * 1985-10-31 1988-05-03 F.M.E. Corporation Electronic meter circuitry
US4802117A (en) * 1985-12-16 1989-01-31 Pitney Bowes Inc. Method of preserving data storage in a postal meter
JPS62266798A (ja) * 1986-05-13 1987-11-19 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPS63153799A (ja) * 1986-08-08 1988-06-27 Nec Corp 半導体メモリ
JPH07109720B2 (ja) * 1988-07-29 1995-11-22 三菱電機株式会社 不揮発性半導体記憶装置
US5021963A (en) * 1988-12-30 1991-06-04 Pitney Bowes Inc. EPM having an improvement in accounting update security
JPH03137900A (ja) * 1989-07-27 1991-06-12 Nec Corp 不揮発性半導体メモリ
US5170044A (en) * 1990-11-09 1992-12-08 Pitney Bowes Inc. Error tolerant 3x3 bit-map coding of binary data and method of decoding

Also Published As

Publication number Publication date
EP0513607A2 (de) 1992-11-19
CA2067466A1 (en) 1992-11-04
EP0513607A3 (en) 1993-11-24
CA2067466C (en) 1997-07-15
DE69217707T2 (de) 1997-07-31
US5502813A (en) 1996-03-26
EP0513607B1 (de) 1997-03-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee