DE69226358D1 - EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar ist - Google Patents
EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar istInfo
- Publication number
- DE69226358D1 DE69226358D1 DE69226358T DE69226358T DE69226358D1 DE 69226358 D1 DE69226358 D1 DE 69226358D1 DE 69226358 T DE69226358 T DE 69226358T DE 69226358 T DE69226358 T DE 69226358T DE 69226358 D1 DE69226358 D1 DE 69226358D1
- Authority
- DE
- Germany
- Prior art keywords
- dielectric
- easily manufactured
- small dimensions
- polysilicon layers
- eprom cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title 1
- 229920005591 polysilicon Polymers 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP92830266A EP0571692B1 (de) | 1992-05-27 | 1992-05-27 | EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar ist |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69226358D1 true DE69226358D1 (de) | 1998-08-27 |
DE69226358T2 DE69226358T2 (de) | 1998-11-26 |
Family
ID=8212111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69226358T Expired - Fee Related DE69226358T2 (de) | 1992-05-27 | 1992-05-27 | EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar ist |
Country Status (4)
Country | Link |
---|---|
US (2) | US5422291A (de) |
EP (1) | EP0571692B1 (de) |
JP (1) | JPH0690008A (de) |
DE (1) | DE69226358T2 (de) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69226358T2 (de) * | 1992-05-27 | 1998-11-26 | Sgs Thomson Microelectronics | EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar ist |
US5913149A (en) * | 1992-12-31 | 1999-06-15 | Micron Technology, Inc. | Method for fabricating stacked layer silicon nitride for low leakage and high capacitance |
US6780718B2 (en) | 1993-11-30 | 2004-08-24 | Stmicroelectronics, Inc. | Transistor structure and method for making same |
US5903494A (en) * | 1994-03-30 | 1999-05-11 | Sgs-Thomson Microelectronics S.A. | Electrically programmable memory cell |
JP2576406B2 (ja) * | 1994-05-25 | 1997-01-29 | 日本電気株式会社 | 不揮発性メモリ装置およびその製造方法 |
JP3600326B2 (ja) * | 1994-09-29 | 2004-12-15 | 旺宏電子股▲ふん▼有限公司 | 不揮発性半導体メモリ装置およびその製造方法 |
US5780364A (en) * | 1994-12-12 | 1998-07-14 | Micron Technology, Inc. | Method to cure mobile ion contamination in semiconductor processing |
US5567638A (en) * | 1995-06-14 | 1996-10-22 | National Science Council | Method for suppressing boron penetration in PMOS with nitridized polysilicon gate |
JPH08212570A (ja) * | 1995-10-06 | 1996-08-20 | Sony Corp | トラッキング誤差検出装置 |
US5847427A (en) * | 1995-12-21 | 1998-12-08 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device utilizing an oxidation suppressing substance to prevent the formation of bird's breaks |
US6103555A (en) * | 1996-06-10 | 2000-08-15 | Integrated Device Technology, Inc. | Method of improving the reliability of low-voltage programmable antifuse |
US7009264B1 (en) * | 1997-07-30 | 2006-03-07 | Micron Technology, Inc. | Selective spacer to prevent metal oxide formation during polycide reoxidation |
US5925918A (en) * | 1997-07-30 | 1999-07-20 | Micron, Technology, Inc. | Gate stack with improved sidewall integrity |
US6399445B1 (en) | 1997-12-18 | 2002-06-04 | Texas Instruments Incorporated | Fabrication technique for controlled incorporation of nitrogen in gate dielectric |
US6258693B1 (en) | 1997-12-23 | 2001-07-10 | Integrated Device Technology, Inc. | Ion implantation for scalability of isolation in an integrated circuit |
US5960294A (en) * | 1998-01-13 | 1999-09-28 | Micron Technology, Inc. | Method of fabricating a semiconductor device utilizing polysilicon grains |
US6087229A (en) * | 1998-03-09 | 2000-07-11 | Lsi Logic Corporation | Composite semiconductor gate dielectrics |
US6051467A (en) * | 1998-04-02 | 2000-04-18 | Chartered Semiconductor Manufacturing, Ltd. | Method to fabricate a large planar area ONO interpoly dielectric in flash device |
US6331468B1 (en) * | 1998-05-11 | 2001-12-18 | Lsi Logic Corporation | Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for subsequent formation of silicon nitride spacers |
US6108236A (en) * | 1998-07-17 | 2000-08-22 | Advanced Technology Materials, Inc. | Smart card comprising integrated circuitry including EPROM and error check and correction system |
US6323114B1 (en) * | 1998-11-24 | 2001-11-27 | Texas Instruments Incorporated | Stacked/composite gate dielectric which incorporates nitrogen at an interface |
US6136642A (en) * | 1998-12-23 | 2000-10-24 | United Microelectronics Corp. | Method of making a dynamic random access memory |
US6368919B2 (en) * | 1999-01-19 | 2002-04-09 | Micron Technology, Inc. | Method and composite for decreasing charge leakage |
JP2000349175A (ja) * | 1999-06-03 | 2000-12-15 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US6512264B1 (en) * | 1999-08-13 | 2003-01-28 | Advanced Micro Devices, Inc. | Flash memory having pre-interpoly dielectric treatment layer and method of forming |
WO2001017031A1 (en) * | 1999-08-27 | 2001-03-08 | Macronix America, Inc. | Easy shrinkable novel non-volatile semiconductor memory cell utilizing split dielectric floating gate and method for making same |
KR100328596B1 (ko) * | 1999-09-15 | 2002-03-15 | 윤종용 | 반도체소자 제조방법 |
US6211045B1 (en) * | 1999-11-30 | 2001-04-03 | Vlsi Technology, Inc. | Incorporation of nitrogen-based gas in polysilicon gate re-oxidation to improve hot carrier performance |
US6362045B1 (en) | 2000-05-09 | 2002-03-26 | Chartered Semiconductor Manufacturing Ltd. | Method to form non-volatile memory cells |
FR2808923A1 (fr) * | 2000-05-15 | 2001-11-16 | Commissariat Energie Atomique | Dispositif de memoire a blocage de coulomb, comprenant une pluralite de pieges a electrons, et procede de realisation d'un tel dispositif |
US20020084482A1 (en) * | 2000-12-31 | 2002-07-04 | Cetin Kaya | Scalable dielectric |
US6642552B2 (en) * | 2001-02-02 | 2003-11-04 | Grail Semiconductor | Inductive storage capacitor |
DE10148491B4 (de) * | 2001-10-01 | 2006-09-07 | Infineon Technologies Ag | Verfahren zum Herstellen einer integrierten Halbleiteranordnung mit Hilfe einer thermischen Oxidation und Halbleiteranordnung |
US6645813B1 (en) * | 2002-01-16 | 2003-11-11 | Taiwan Semiconductor Manufacturing Company | Flash EEPROM with function bit by bit erasing |
US20030232507A1 (en) * | 2002-06-12 | 2003-12-18 | Macronix International Co., Ltd. | Method for fabricating a semiconductor device having an ONO film |
US6630383B1 (en) * | 2002-09-23 | 2003-10-07 | Advanced Micro Devices, Inc. | Bi-layer floating gate for improved work function between floating gate and a high-K dielectric layer |
KR100537277B1 (ko) * | 2002-11-27 | 2005-12-19 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
KR100482752B1 (ko) * | 2002-12-26 | 2005-04-14 | 주식회사 하이닉스반도체 | 비휘발성 메모리 소자의 제조 방법 |
KR100579844B1 (ko) * | 2003-11-05 | 2006-05-12 | 동부일렉트로닉스 주식회사 | 비휘발성 메모리 소자 및 그 제조방법 |
TWI254990B (en) * | 2003-11-14 | 2006-05-11 | Samsung Electronics Co Ltd | Method of manufacturing a thin dielectric layer using a heat treatment and a semiconductor device formed using the method |
KR100546394B1 (ko) * | 2003-11-14 | 2006-01-26 | 삼성전자주식회사 | 비휘발성 메모리 소자 및 그 제조 방법 |
JP4216707B2 (ja) * | 2003-12-25 | 2009-01-28 | 株式会社東芝 | 半導体装置の製造方法 |
KR100536807B1 (ko) * | 2004-06-24 | 2005-12-14 | 동부아남반도체 주식회사 | 반도체 장치의 캐패시터 및 그의 제조 방법 |
US7576386B2 (en) * | 2005-08-04 | 2009-08-18 | Macronix International Co., Ltd. | Non-volatile memory semiconductor device having an oxide-nitride-oxide (ONO) top dielectric layer |
JP4282692B2 (ja) * | 2006-06-27 | 2009-06-24 | 株式会社東芝 | 半導体装置の製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4619034A (en) * | 1983-05-02 | 1986-10-28 | Ncr Corporation | Method of making laser recrystallized silicon-on-insulator nonvolatile memory device |
CA1252372A (en) * | 1985-01-21 | 1989-04-11 | Joseph P. Ellul | Nitsinitride and oxidized nitsinitride dielectrics on silicon |
IT1191755B (it) * | 1986-04-29 | 1988-03-23 | Sgs Microelettronica Spa | Processo di fabbricazione per celle eprom con dielettrico ossido-nitruro-ossido |
JPH0746704B2 (ja) * | 1986-05-15 | 1995-05-17 | 松下電子工業株式会社 | 半導体記憶装置 |
JPH07118511B2 (ja) * | 1989-01-17 | 1995-12-18 | 株式会社東芝 | 不揮発性半導体記憶装置 |
US5304829A (en) * | 1989-01-17 | 1994-04-19 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor device |
US5104819A (en) * | 1989-08-07 | 1992-04-14 | Intel Corporation | Fabrication of interpoly dielctric for EPROM-related technologies |
JPH03262150A (ja) * | 1990-03-13 | 1991-11-21 | Matsushita Electron Corp | 半導体容量装置 |
US5032545A (en) * | 1990-10-30 | 1991-07-16 | Micron Technology, Inc. | Process for preventing a native oxide from forming on the surface of a semiconductor material and integrated circuit capacitors produced thereby |
DE69226358T2 (de) * | 1992-05-27 | 1998-11-26 | Sgs Thomson Microelectronics | EPROM-Zelle mit Dielektricum zwischen Polysiliziumschichten, das leicht in kleinen Dimensionen herstellbar ist |
-
1992
- 1992-05-27 DE DE69226358T patent/DE69226358T2/de not_active Expired - Fee Related
- 1992-05-27 EP EP92830266A patent/EP0571692B1/de not_active Expired - Lifetime
-
1993
- 1993-05-26 US US08/067,386 patent/US5422291A/en not_active Expired - Lifetime
- 1993-05-27 JP JP5151414A patent/JPH0690008A/ja active Pending
-
1995
- 1995-06-01 US US08/457,514 patent/US5600166A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0571692A1 (de) | 1993-12-01 |
DE69226358T2 (de) | 1998-11-26 |
US5422291A (en) | 1995-06-06 |
EP0571692B1 (de) | 1998-07-22 |
US5600166A (en) | 1997-02-04 |
JPH0690008A (ja) | 1994-03-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |