DE69318348D1 - Schnittstelle für asynchronen Bus zur Minimisierung von Übertragungszeiten - Google Patents

Schnittstelle für asynchronen Bus zur Minimisierung von Übertragungszeiten

Info

Publication number
DE69318348D1
DE69318348D1 DE69318348T DE69318348T DE69318348D1 DE 69318348 D1 DE69318348 D1 DE 69318348D1 DE 69318348 T DE69318348 T DE 69318348T DE 69318348 T DE69318348 T DE 69318348T DE 69318348 D1 DE69318348 D1 DE 69318348D1
Authority
DE
Germany
Prior art keywords
interface
transmission times
minimize transmission
asynchronous bus
asynchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69318348T
Other languages
English (en)
Other versions
DE69318348T2 (de
Inventor
Chester Walenty Pawlowski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of DE69318348D1 publication Critical patent/DE69318348D1/de
Publication of DE69318348T2 publication Critical patent/DE69318348T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
DE69318348T 1992-07-17 1993-07-19 Schnittstelle für asynchronen Bus zur Minimisierung von Übertragungszeiten Expired - Fee Related DE69318348T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/916,327 US5469547A (en) 1992-07-17 1992-07-17 Asynchronous bus interface for generating individual handshake signal for each data transfer based on associated propagation delay within a transaction

Publications (2)

Publication Number Publication Date
DE69318348D1 true DE69318348D1 (de) 1998-06-10
DE69318348T2 DE69318348T2 (de) 1998-12-17

Family

ID=25437082

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69318348T Expired - Fee Related DE69318348T2 (de) 1992-07-17 1993-07-19 Schnittstelle für asynchronen Bus zur Minimisierung von Übertragungszeiten

Country Status (3)

Country Link
US (1) US5469547A (de)
EP (1) EP0579515B1 (de)
DE (1) DE69318348T2 (de)

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JP2551338B2 (ja) * 1993-07-23 1996-11-06 日本電気株式会社 情報処理装置
GB2289778B (en) * 1994-05-17 1998-12-16 Advanced Risc Mach Ltd Data processing
US5933430A (en) * 1995-08-12 1999-08-03 Sony Corporation Data communication method
US5805872A (en) * 1995-09-08 1998-09-08 Digital Equipment Corporation Apparatus for generation of control signals from the read cycle rate and read speed of a memory
JPH09311812A (ja) * 1996-05-24 1997-12-02 Oki Electric Ind Co Ltd マイクロコンピュータ
US5761454A (en) * 1996-08-27 1998-06-02 Vlsi Technology, Inc. Deadlock resolution methods and apparatus for interfacing concurrent and asynchronous buses
US6141765A (en) * 1997-05-19 2000-10-31 Gigabus, Inc. Low power, high speed communications bus
US5948083A (en) * 1997-09-30 1999-09-07 S3 Incorporated System and method for self-adjusting data strobe
SE9900517L (sv) * 1999-02-17 2000-08-18 Axis Ab Gränssnitt och metod för kommunikation
US6609171B1 (en) * 1999-12-29 2003-08-19 Intel Corporation Quad pumped bus architecture and protocol
US7142671B2 (en) * 2000-12-13 2006-11-28 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US7366300B2 (en) * 2000-12-13 2008-04-29 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US7502463B2 (en) * 2000-12-13 2009-03-10 Broadcom Corporation Methods and apparatus for implementing a cryptography engine
US20040010652A1 (en) * 2001-06-26 2004-01-15 Palmchip Corporation System-on-chip (SOC) architecture with arbitrary pipeline depth
KR20030030318A (ko) * 2001-10-09 2003-04-18 이문기 유니버설 브릿지 제어 구조
US6791821B1 (en) 2001-10-16 2004-09-14 Yosemite Investment, Inc. Tantalum-carbon hybrid capacitor with activated carbon
JP3852437B2 (ja) * 2003-11-19 2006-11-29 セイコーエプソン株式会社 同期・非同期インターフェース回路及び電子機器
US7854706B2 (en) * 2007-12-27 2010-12-21 Devicor Medical Products, Inc. Clutch and valving system for tetherless biopsy device
US9489009B2 (en) 2014-02-20 2016-11-08 Samsung Electronics Co., Ltd. System on chip, bus interface and method of operating the same
US9684622B2 (en) * 2014-06-09 2017-06-20 Micron Technology, Inc. Method and apparatus for controlling access to a common bus by multiple components

Family Cites Families (20)

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Publication number Priority date Publication date Assignee Title
NL288425A (de) * 1962-02-01
US3962683A (en) * 1971-08-31 1976-06-08 Max Brown CPU programmable control system
US3891971A (en) * 1971-11-11 1975-06-24 Rockwell International Corp Serial data multiplexing apparatus
US3974479A (en) * 1973-05-01 1976-08-10 Digital Equipment Corporation Memory for use in a computer system in which memories have diverse retrieval characteristics
US3919695A (en) * 1973-12-26 1975-11-11 Ibm Asynchronous clocking apparatus
JPS5151248A (en) * 1974-10-31 1976-05-06 Fujitsu Ltd Shingotensohoshiki
US4153941A (en) * 1976-11-11 1979-05-08 Kearney & Trecker Corporation Timing circuit and method for controlling the operation of cyclical devices
US4191998A (en) * 1978-03-29 1980-03-04 Honeywell Inc. Variable symmetry multiphase clock generator
JPS564854A (en) * 1979-06-22 1981-01-19 Fanuc Ltd Control system for plural microprocessors
JPS6019269A (ja) * 1983-07-13 1985-01-31 Nec Corp 高速デ−タ転送方式
US4788656A (en) * 1984-05-25 1988-11-29 The Johns Hopkins University Cache memory and pre-processor
US4675864A (en) * 1985-06-04 1987-06-23 Hewlett-Packard Company Serial bus system
US5109494A (en) * 1987-12-31 1992-04-28 Texas Instruments Incorporated Passive processor communications interface
US5225374A (en) * 1988-05-13 1993-07-06 The United States Of America As Represented By The Secretary Of The Navy Method of fabricating a receptor-based sensor
US5097437A (en) * 1988-07-17 1992-03-17 Larson Ronald J Controller with clocking device controlling first and second state machine controller which generate different control signals for different set of devices
US5237676A (en) * 1989-01-13 1993-08-17 International Business Machines Corp. High speed data transfer system which adjusts data transfer speed in response to indicated transfer speed capability of connected device
US5079696A (en) * 1989-09-11 1992-01-07 Sun Microsystems, Inc. Apparatus for read handshake in high-speed asynchronous bus interface
US5220651A (en) * 1989-10-11 1993-06-15 Micral, Inc. Cpu-bus controller for accomplishing transfer operations between a controller and devices coupled to an input/output bus
US5191657A (en) * 1989-11-09 1993-03-02 Ast Research, Inc. Microcomputer architecture utilizing an asynchronous bus between microprocessor and industry standard synchronous bus
US5297141A (en) * 1990-08-07 1994-03-22 Farallon Computing, Inc. Ethernet automatic adapter interface card

Also Published As

Publication number Publication date
DE69318348T2 (de) 1998-12-17
US5469547A (en) 1995-11-21
EP0579515A1 (de) 1994-01-19
EP0579515B1 (de) 1998-05-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee