DE69321499D1 - Elektrische Verbindung zwischen einer Siliziumfläche und einer Oxidschicht mit einem Indium-Gehalt - Google Patents

Elektrische Verbindung zwischen einer Siliziumfläche und einer Oxidschicht mit einem Indium-Gehalt

Info

Publication number
DE69321499D1
DE69321499D1 DE69321499T DE69321499T DE69321499D1 DE 69321499 D1 DE69321499 D1 DE 69321499D1 DE 69321499 T DE69321499 T DE 69321499T DE 69321499 T DE69321499 T DE 69321499T DE 69321499 D1 DE69321499 D1 DE 69321499D1
Authority
DE
Germany
Prior art keywords
electrical connection
oxide layer
silicon surface
indium content
indium
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69321499T
Other languages
English (en)
Other versions
DE69321499T2 (de
Inventor
Masaru Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of DE69321499D1 publication Critical patent/DE69321499D1/de
Application granted granted Critical
Publication of DE69321499T2 publication Critical patent/DE69321499T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69321499T 1992-02-28 1993-02-25 Elektrische Verbindung zwischen einer Siliziumfläche und einer Oxidschicht mit einem Indium-Gehalt Expired - Fee Related DE69321499T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4075981A JPH05243579A (ja) 1992-02-28 1992-02-28 半導体装置

Publications (2)

Publication Number Publication Date
DE69321499D1 true DE69321499D1 (de) 1998-11-19
DE69321499T2 DE69321499T2 (de) 1999-05-06

Family

ID=13591953

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69321499T Expired - Fee Related DE69321499T2 (de) 1992-02-28 1993-02-25 Elektrische Verbindung zwischen einer Siliziumfläche und einer Oxidschicht mit einem Indium-Gehalt

Country Status (4)

Country Link
US (1) US5650664A (de)
EP (1) EP0558007B1 (de)
JP (1) JPH05243579A (de)
DE (1) DE69321499T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2860869B2 (ja) * 1993-12-02 1999-02-24 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
JPH07221174A (ja) * 1993-12-10 1995-08-18 Canon Inc 半導体装置及びその製造方法
JP3486993B2 (ja) * 1994-12-28 2004-01-13 セイコーエプソン株式会社 アクティブマトリクス基板、及び液晶表示装置
JPH09105953A (ja) * 1995-10-12 1997-04-22 Semiconductor Energy Lab Co Ltd 液晶表示装置
US6900855B1 (en) * 1995-10-12 2005-05-31 Semiconductor Energy Laboratory Co., Ltd. Display device having resin black matrix over counter substrate
JP3597305B2 (ja) * 1996-03-05 2004-12-08 株式会社半導体エネルギー研究所 液晶表示装置およびその作製方法
JP2850850B2 (ja) * 1996-05-16 1999-01-27 日本電気株式会社 半導体装置の製造方法
JP3640224B2 (ja) * 1996-06-25 2005-04-20 株式会社半導体エネルギー研究所 液晶表示パネル
US7298447B1 (en) 1996-06-25 2007-11-20 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display panel
JP3856889B2 (ja) * 1997-02-06 2006-12-13 株式会社半導体エネルギー研究所 反射型表示装置および電子デバイス
TW531684B (en) * 1997-03-31 2003-05-11 Seiko Epson Corporatoin Display device and method for manufacturing the same
KR100252223B1 (ko) * 1997-08-30 2000-04-15 윤종용 반도체장치의 콘택홀 세정방법
JP3362008B2 (ja) * 1999-02-23 2003-01-07 シャープ株式会社 液晶表示装置およびその製造方法
JP4450850B2 (ja) * 2007-09-26 2010-04-14 Ｏｋｉセミコンダクタ株式会社 半導体装置の製造方法
WO2011070901A1 (en) 2009-12-11 2011-06-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
CN106960814A (zh) * 2016-01-08 2017-07-18 中华映管股份有限公司 像素结构的制造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58190063A (ja) * 1982-04-30 1983-11-05 Seiko Epson Corp 透過型液晶表示パネル用薄膜トランジスタ
JPS5922361A (ja) * 1982-07-28 1984-02-04 Seiko Epson Corp アクティブマトリクス液晶表示装置
JPS5940582A (ja) * 1982-08-30 1984-03-06 Seiko Epson Corp 半導体装置
EP0211402B1 (de) * 1985-08-02 1991-05-08 General Electric Company Verfahren und Struktur für dünnfilmtransistorgesteuerte Flüssigkristallmatrixanordnungen
US4646424A (en) * 1985-08-02 1987-03-03 General Electric Company Deposition and hardening of titanium gate electrode material for use in inverted thin film field effect transistors
JPS62250422A (ja) * 1986-04-23 1987-10-31 Matsushita Electric Ind Co Ltd 液晶パネルとその製法
JPH01102434A (ja) * 1987-10-15 1989-04-20 Sharp Corp マトリックス型液晶表示パネル
JP2596949B2 (ja) * 1987-11-06 1997-04-02 シャープ株式会社 液晶表示装置の製造方法
JPH01276746A (ja) * 1988-04-28 1989-11-07 Sony Corp 配線形成方法
JP2893686B2 (ja) * 1988-09-02 1999-05-24 ソニー株式会社 半導体装置の製造方法
JP2756841B2 (ja) * 1989-10-13 1998-05-25 株式会社日立製作所 表示装置
JP2940051B2 (ja) * 1990-02-09 1999-08-25 富士通株式会社 絶縁薄膜の形成方法
JPH06208132A (ja) * 1990-03-24 1994-07-26 Sony Corp 液晶表示装置
US5367179A (en) * 1990-04-25 1994-11-22 Casio Computer Co., Ltd. Thin-film transistor having electrodes made of aluminum, and an active matrix panel using same
US5402254B1 (en) * 1990-10-17 1998-09-22 Hitachi Ltd Liquid crystal display device with tfts in which pixel electrodes are formed in the same plane as the gate electrodes with anodized oxide films before the deposition of silicon
KR960014823B1 (ko) * 1991-03-15 1996-10-21 가부시기가이샤 히다찌세이사구쇼 액정표시장치

Also Published As

Publication number Publication date
JPH05243579A (ja) 1993-09-21
EP0558007B1 (de) 1998-10-14
US5650664A (en) 1997-07-22
DE69321499T2 (de) 1999-05-06
EP0558007A2 (de) 1993-09-01
EP0558007A3 (en) 1993-11-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee