DE69333294D1 - Halbleiteranordnung und Verfahren zu seiner Herstellung - Google Patents

Halbleiteranordnung und Verfahren zu seiner Herstellung

Info

Publication number
DE69333294D1
DE69333294D1 DE69333294T DE69333294T DE69333294D1 DE 69333294 D1 DE69333294 D1 DE 69333294D1 DE 69333294 T DE69333294 T DE 69333294T DE 69333294 T DE69333294 T DE 69333294T DE 69333294 D1 DE69333294 D1 DE 69333294D1
Authority
DE
Germany
Prior art keywords
production
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69333294T
Other languages
English (en)
Other versions
DE69333294T2 (de
Inventor
Kiyofumi Sakaguchi
Takao Yonehara
Shoji Nishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Application granted granted Critical
Publication of DE69333294D1 publication Critical patent/DE69333294D1/de
Publication of DE69333294T2 publication Critical patent/DE69333294T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02422Non-crystalline insulating materials, e.g. glass, polymers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02598Microstructure monocrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/977Thinning or removal of substrate
DE69333294T 1992-01-31 1993-01-29 Halbleiteranordnung und Verfahren zu seiner Herstellung Expired - Fee Related DE69333294T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP04630792A JP3250673B2 (ja) 1992-01-31 1992-01-31 半導体素子基体とその作製方法
JP4630792 1992-01-31

Publications (2)

Publication Number Publication Date
DE69333294D1 true DE69333294D1 (de) 2003-12-18
DE69333294T2 DE69333294T2 (de) 2004-09-09

Family

ID=12743539

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69333294T Expired - Fee Related DE69333294T2 (de) 1992-01-31 1993-01-29 Halbleiteranordnung und Verfahren zu seiner Herstellung

Country Status (4)

Country Link
US (1) US5492859A (de)
EP (1) EP0553855B1 (de)
JP (1) JP3250673B2 (de)
DE (1) DE69333294T2 (de)

Families Citing this family (72)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1347505A3 (de) * 1991-02-15 2004-10-20 Canon Kabushiki Kaisha Verfahren zur Vorbereitung einer Halbleitervorrichtung unter Verwendung der Ätzlösung
EP1179842A3 (de) * 1992-01-31 2002-09-04 Canon Kabushiki Kaisha Halbleitersubstrat und Herstellungsverfahren
US6004865A (en) * 1993-09-06 1999-12-21 Hitachi, Ltd. Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator
JP3250721B2 (ja) * 1995-12-12 2002-01-28 キヤノン株式会社 Soi基板の製造方法
FR2748851B1 (fr) * 1996-05-15 1998-08-07 Commissariat Energie Atomique Procede de realisation d'une couche mince de materiau semiconducteur
US6054363A (en) * 1996-11-15 2000-04-25 Canon Kabushiki Kaisha Method of manufacturing semiconductor article
DE69728022T2 (de) * 1996-12-18 2004-08-12 Canon K.K. Vefahren zum Herstellen eines Halbleiterartikels unter Verwendung eines Substrates mit einer porösen Halbleiterschicht
US6756289B1 (en) 1996-12-27 2004-06-29 Canon Kabushiki Kaisha Method of producing semiconductor member and method of producing solar cell
EP0851513B1 (de) * 1996-12-27 2007-11-21 Canon Kabushiki Kaisha Herstellungsverfahren eines Halbleiter-Bauelements und Herstellungsverfahren einer Solarzelle
US6143628A (en) * 1997-03-27 2000-11-07 Canon Kabushiki Kaisha Semiconductor substrate and method of manufacturing the same
JP3985065B2 (ja) 1997-05-14 2007-10-03 忠弘 大見 多孔質シリコン基板の形成方法及び多孔質シリコン基板の形成装置
EP0895282A3 (de) 1997-07-30 2000-01-26 Canon Kabushiki Kaisha Verfahren zur Herstellung eines SOI-Substrates mittels eines Bond-Verfahrens und dadurch hergestelltes SOI-Substrat
DE19803013B4 (de) * 1998-01-27 2005-02-03 Robert Bosch Gmbh Verfahren zum Ablösen einer Epitaxieschicht oder eines Schichtsystems und nachfolgendem Aufbringen auf einen alternativen Träger
EP0996145A3 (de) * 1998-09-04 2000-11-08 Canon Kabushiki Kaisha Verfahren zur Herstellung von Halbleitersubstraten
JP3903215B2 (ja) * 1998-11-24 2007-04-11 ダイキン工業株式会社 エッチング液
US6080683A (en) * 1999-03-22 2000-06-27 Special Materials Research And Technology, Inc. Room temperature wet chemical growth process of SiO based oxides on silicon
US6593077B2 (en) 1999-03-22 2003-07-15 Special Materials Research And Technology, Inc. Method of making thin films dielectrics using a process for room temperature wet chemical growth of SiO based oxides on a substrate
US6392257B1 (en) * 2000-02-10 2002-05-21 Motorola Inc. Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same
US6693033B2 (en) 2000-02-10 2004-02-17 Motorola, Inc. Method of removing an amorphous oxide from a monocrystalline surface
US6858462B2 (en) * 2000-04-11 2005-02-22 Gratings, Inc. Enhanced light absorption of solar cells and photodetectors by diffraction
JP2004503920A (ja) * 2000-05-31 2004-02-05 モトローラ・インコーポレイテッド 半導体デバイスおよび該半導体デバイスを製造する方法
US6501973B1 (en) 2000-06-30 2002-12-31 Motorola, Inc. Apparatus and method for measuring selected physical condition of an animate subject
US6590236B1 (en) 2000-07-24 2003-07-08 Motorola, Inc. Semiconductor structure for use with high-frequency signals
WO2002009187A2 (en) * 2000-07-24 2002-01-31 Motorola, Inc. Heterojunction tunneling diodes and process for fabricating same
US6555946B1 (en) 2000-07-24 2003-04-29 Motorola, Inc. Acoustic wave device and process for forming the same
US6493497B1 (en) 2000-09-26 2002-12-10 Motorola, Inc. Electro-optic structure and process for fabricating same
US6638838B1 (en) 2000-10-02 2003-10-28 Motorola, Inc. Semiconductor structure including a partially annealed layer and method of forming the same
US6559471B2 (en) 2000-12-08 2003-05-06 Motorola, Inc. Quantum well infrared photodetector and method for fabricating same
JP4511092B2 (ja) * 2000-12-11 2010-07-28 セイコーエプソン株式会社 半導体素子の製造方法
KR20020060457A (ko) * 2001-01-11 2002-07-18 송오성 에스오아이 기판의 제조방법
US20020096683A1 (en) * 2001-01-19 2002-07-25 Motorola, Inc. Structure and method for fabricating GaN devices utilizing the formation of a compliant substrate
US6673646B2 (en) 2001-02-28 2004-01-06 Motorola, Inc. Growth of compound semiconductor structures on patterned oxide films and process for fabricating same
US6709989B2 (en) 2001-06-21 2004-03-23 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6613697B1 (en) 2001-06-26 2003-09-02 Special Materials Research And Technology, Inc. Low metallic impurity SiO based thin film dielectrics on semiconductor substrates using a room temperature wet chemical growth process, method and applications thereof
US20030010992A1 (en) * 2001-07-16 2003-01-16 Motorola, Inc. Semiconductor structure and method for implementing cross-point switch functionality
US6531740B2 (en) 2001-07-17 2003-03-11 Motorola, Inc. Integrated impedance matching and stability network
US6646293B2 (en) 2001-07-18 2003-11-11 Motorola, Inc. Structure for fabricating high electron mobility transistors utilizing the formation of complaint substrates
US6693298B2 (en) 2001-07-20 2004-02-17 Motorola, Inc. Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same
US6855992B2 (en) * 2001-07-24 2005-02-15 Motorola Inc. Structure and method for fabricating configurable transistor devices utilizing the formation of a compliant substrate for materials used to form the same
US6594414B2 (en) 2001-07-25 2003-07-15 Motorola, Inc. Structure and method of fabrication for an optical switch
US6585424B2 (en) 2001-07-25 2003-07-01 Motorola, Inc. Structure and method for fabricating an electro-rheological lens
US6667196B2 (en) 2001-07-25 2003-12-23 Motorola, Inc. Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method
US6589856B2 (en) 2001-08-06 2003-07-08 Motorola, Inc. Method and apparatus for controlling anti-phase domains in semiconductor structures and devices
US6639249B2 (en) 2001-08-06 2003-10-28 Motorola, Inc. Structure and method for fabrication for a solid-state lighting device
US6673667B2 (en) 2001-08-15 2004-01-06 Motorola, Inc. Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials
US20030036217A1 (en) * 2001-08-16 2003-02-20 Motorola, Inc. Microcavity semiconductor laser coupled to a waveguide
KR20030032133A (ko) * 2001-10-10 2003-04-26 유종훈 비정질실리콘 박막층이 증착된 다공질실리콘 반도체의제조방법
US20030071327A1 (en) * 2001-10-17 2003-04-17 Motorola, Inc. Method and apparatus utilizing monocrystalline insulator
KR20030064536A (ko) * 2002-01-28 2003-08-02 텔레포스 주식회사 산화된 다공성 실리콘층을 이용한 고주파 소자
KR100475077B1 (ko) * 2002-05-31 2005-03-10 삼성전자주식회사 캐패시터의 유전막 형성방법
US20040012037A1 (en) * 2002-07-18 2004-01-22 Motorola, Inc. Hetero-integration of semiconductor materials on silicon
US20040069991A1 (en) * 2002-10-10 2004-04-15 Motorola, Inc. Perovskite cuprate electronic device structure and process
US20040070312A1 (en) * 2002-10-10 2004-04-15 Motorola, Inc. Integrated circuit and process for fabricating the same
US7020374B2 (en) * 2003-02-03 2006-03-28 Freescale Semiconductor, Inc. Optical waveguide structure and method for fabricating the same
US6965128B2 (en) * 2003-02-03 2005-11-15 Freescale Semiconductor, Inc. Structure and method for fabricating semiconductor microresonator devices
US20040164315A1 (en) * 2003-02-25 2004-08-26 Motorola, Inc. Structure and device including a tunneling piezoelectric switch and method of forming same
US7592239B2 (en) 2003-04-30 2009-09-22 Industry University Cooperation Foundation-Hanyang University Flexible single-crystal film and method of manufacturing the same
JP4959552B2 (ja) * 2004-04-28 2012-06-27 アイユーシーエフ‐エイチワイユー 可撓性単結晶フィルム及びその製造方法
KR20060081296A (ko) * 2005-01-08 2006-07-12 삼성코닝 주식회사 실리콘 필름의 제조방법
FR2886051B1 (fr) * 2005-05-20 2007-08-10 Commissariat Energie Atomique Procede de detachement d'un film mince
US20070111468A1 (en) * 2005-07-19 2007-05-17 The Regents Of The University Of California Method for fabricating dislocation-free stressed thin films
EP1926132A1 (de) * 2006-11-23 2008-05-28 S.O.I.Tec Silicon on Insulator Technologies Chromfreie Ätzlösung für Si-Substrate und SiGe-substrate, Verfahren zum Präparieren von Defekten diese Ätzlösung verwendend und Verfahren zum Behnadeln von Si-Substraten und SiGe-Substraten
DE102007006151B4 (de) 2007-02-07 2008-11-06 Siltronic Ag Verfahren zur Verringerung und Homogenisierung der Dicke einer Halbleiterschicht, die sich auf der Oberfläche eines elektrisch isolierenden Materials befindet
US8871610B2 (en) * 2008-10-02 2014-10-28 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
FR2938120B1 (fr) * 2008-10-31 2011-04-08 Commissariat Energie Atomique Procede de formation d'une couche monocristalline dans le domaine micro-electronique
FR2938117B1 (fr) * 2008-10-31 2011-04-15 Commissariat Energie Atomique Procede d'elaboration d'un substrat hybride ayant une couche continue electriquement isolante enterree
JP5158807B2 (ja) * 2009-02-10 2013-03-06 独立行政法人産業技術総合研究所 光電変換素子およびその製造方法
FR2953640B1 (fr) 2009-12-04 2012-02-10 S O I Tec Silicon On Insulator Tech Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante
US9287353B2 (en) * 2010-11-30 2016-03-15 Kyocera Corporation Composite substrate and method of manufacturing the same
TWI642086B (zh) * 2014-02-18 2018-11-21 日商日本碍子股份有限公司 Substrate substrate and method for manufacturing composite substrate for semiconductor
US10553474B1 (en) * 2018-08-29 2020-02-04 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a semiconductor-on-insulator (SOI) substrate
US11232974B2 (en) * 2018-11-30 2022-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Fabrication method of metal-free SOI wafer

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3929529A (en) * 1974-12-09 1975-12-30 Ibm Method for gettering contaminants in monocrystalline silicon
US4628591A (en) * 1984-10-31 1986-12-16 Texas Instruments Incorporated Method for obtaining full oxide isolation of epitaxial islands in silicon utilizing selective oxidation of porous silicon
JPH0624231B2 (ja) * 1985-06-13 1994-03-30 沖電気工業株式会社 半導体装置の製造方法
FR2620571B1 (fr) * 1987-09-11 1990-01-12 France Etat Procede de fabrication d'une structure de silicium sur isolant
US5147808A (en) * 1988-11-02 1992-09-15 Universal Energy Systems, Inc. High energy ion implanted silicon on insulator structure
US5094697A (en) * 1989-06-16 1992-03-10 Canon Kabushiki Kaisha Photovoltaic device and method for producing the same
US5013681A (en) * 1989-09-29 1991-05-07 The United States Of America As Represented By The Secretary Of The Navy Method of producing a thin silicon-on-insulator layer
DE69133359T2 (de) * 1990-08-03 2004-12-16 Canon K.K. Verfahren zur Herstellung eines SOI-Substrats
US5240876A (en) * 1991-02-22 1993-08-31 Harris Corporation Method of fabricating SOI wafer with SiGe as an etchback film in a BESOI process
JP3112106B2 (ja) * 1991-10-11 2000-11-27 キヤノン株式会社 半導体基材の作製方法

Also Published As

Publication number Publication date
JP3250673B2 (ja) 2002-01-28
DE69333294T2 (de) 2004-09-09
EP0553855A3 (en) 1997-09-10
JPH05275329A (ja) 1993-10-22
US5492859A (en) 1996-02-20
EP0553855B1 (de) 2003-11-12
EP0553855A2 (de) 1993-08-04

Similar Documents

Publication Publication Date Title
DE69333294D1 (de) Halbleiteranordnung und Verfahren zu seiner Herstellung
DE4323799B4 (de) Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE69331534D1 (de) Halbleiter-Speicherbauteil und Verfahren zu seiner Herstellung
DE69536084D1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE69309583T2 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE69329635T2 (de) Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE69231290D1 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE69332231D1 (de) Halbleitersubstrat und Verfahren zu seiner Herstellung
DE69327860D1 (de) Verbindungshalbleiterbauelement und Verfahren zu seiner Herstellung
DE69318771D1 (de) Multichip-Modul und Verfahren zu seiner Herstellung
DE69331677T2 (de) Halbleiter-Speicherbauteil und Verfahren zu seiner Herstellung
DE19651550B8 (de) Halbleitervorrichtung und Verfahren zu deren Herstellung
DE59209470D1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE69033900T2 (de) Halbleiteranordnung und Verfahren zu seiner Herstellung
DE69327434D1 (de) Dünnschicht-Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE69128963D1 (de) Halbleitervorrichtung und Verfahren zu seiner Herstellung
DE69330302T2 (de) Halbleiterspeicheranordnung und Verfahren zu ihrer Herstellung
DE69209336D1 (de) Mikroelektronischer ballistischer Transistor und Verfahren zu seiner Herstellung
DE69223376T2 (de) Verbindungshalbleiterbauelement und Verfahren zu seiner Herstellung
DE69219100D1 (de) Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE69531127D1 (de) Halbleitervorrichtung und Verfahren zu deren Herstellung
DE69329620D1 (de) Verbindervorrichtung und verfahren zu seiner herstellung
DE69232472T2 (de) MOS-Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE69328751D1 (de) Emitter-geschalteter Thyristor und Verfahren zu seiner Herstellung
DE69224978T2 (de) Optisches halbleiter-bauteil und verfahren zu seiner herstellung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee