DE69424927D1 - Datenleseverfahren in Halbleiterspeicheranordnung geeignet zum Speichern von drei- oder mehrwertigen Daten in einer Speicherzelle - Google Patents

Datenleseverfahren in Halbleiterspeicheranordnung geeignet zum Speichern von drei- oder mehrwertigen Daten in einer Speicherzelle

Info

Publication number: DE69424927D1
Authority: DE; Germany
Prior art keywords: storing; data; reading method; arrangement suitable; memory cell
Prior art date: 1993-12-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

DE69424927T

Other languages

English (en)

Other versions

DE69424927T2 (de

Inventor

Katsuki Hazama

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Intellectual Ventures I LLC

Original Assignee

Nippon Steel Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1993-12-28

Filing date

1994-12-20

Publication date

2000-07-20

Family has litigation

First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=18420159&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE69424927(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.

1994-12-20 Application filed by Nippon Steel Corp filed Critical Nippon Steel Corp

2000-07-20 Publication of DE69424927D1 publication Critical patent/DE69424927D1/de

2001-02-01 Application granted granted Critical

2001-02-01 Publication of DE69424927T2 publication Critical patent/DE69424927T2/de

2014-12-21 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

239000004065 semiconductor Substances 0.000 title 1

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5632—Multilevel reading using successive approximation

DE69424927T 1993-12-28 1994-12-20 Datenleseverfahren in Halbleiterspeicheranordnung geeignet zum Speichern von drei- oder mehrwertigen Daten in einer Speicherzelle Expired - Lifetime DE69424927T2 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP35186793A JP3205658B2 (ja)	1993-12-28	1993-12-28	半導体記憶装置の読み出し方法

Publications (2)

Publication Number	Publication Date
DE69424927D1 true DE69424927D1 (de)	2000-07-20
DE69424927T2 DE69424927T2 (de)	2001-02-01

Family

ID=18420159

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
DE69424927T Expired - Lifetime DE69424927T2 (de)	1993-12-28	1994-12-20	Datenleseverfahren in Halbleiterspeicheranordnung geeignet zum Speichern von drei- oder mehrwertigen Daten in einer Speicherzelle

Country Status (5)

Country	Link
US (4)	US5515321A (de)
EP (1)	EP0661711B1 (de)
JP (1)	JP3205658B2 (de)
KR (1)	KR0145243B1 (de)
DE (1)	DE69424927T2 (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5815434A (en) *	1995-09-29	1998-09-29	Intel Corporation	Multiple writes per a single erase for a nonvolatile memory
KR100192476B1 (ko) *	1996-06-26	1999-06-15	구본준	다중 비트 메모리 셀의 데이타 센싱장치 및 방법
US6023781A (en) *	1996-09-18	2000-02-08	Nippon Steel Corporation	Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
US6857099B1 (en)	1996-09-18	2005-02-15	Nippon Steel Corporation	Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
US5835406A (en) *	1996-10-24	1998-11-10	Micron Quantum Devices, Inc.	Apparatus and method for selecting data bits read from a multistate memory
JPH10302482A (ja) *	1997-02-27	1998-11-13	Sanyo Electric Co Ltd	半導体メモリ
KR100604960B1 (ko)	1997-03-28	2006-07-26	가부시키가이샤 히타치세이사쿠쇼	불휘발성 반도체 기억장치 및 그 제조방법 및 반도체 장치 및 그 제조방법
TW376534B (en)	1997-04-18	1999-12-11	Pegre Semiconductors Llc	A semiconductor device and thereof
US5851881A (en) *	1997-10-06	1998-12-22	Taiwan Semiconductor Manufacturing Company, Ltd.	Method of making monos flash memory for multi-level logic
EP0945869B1 (de) *	1998-03-27	2004-11-17	STMicroelectronics S.r.l.	Verfahren zum Lesen einer Mehrbitspeicherzelle
JPH11283386A (ja) *	1998-03-31	1999-10-15	Nec Ic Microcomput Syst Ltd	半導体記憶装置
IT1313197B1 (it) *	1999-07-22	2002-06-17	St Microelectronics Srl	Metodo per la memorizzazione di byte in celle di memoria non volatilimultilivello.
US6707713B1 (en) *	2000-03-01	2004-03-16	Advanced Micro Devices, Inc.	Interlaced multi-level memory
CN1321375C (zh) *	2002-06-18	2007-06-13	旺宏电子股份有限公司	存储器读取装置及读取方法
DE60317768T2 (de) *	2003-04-10	2008-11-27	Stmicroelectronics S.R.L., Agrate Brianza	Verfahren zum Auslesen einer nichtflüchtigen Speichervorrichtung und zugehörige Vorrichtung
JP4647446B2 (ja) *	2005-09-20	2011-03-09	富士通株式会社	半導体記憶装置
US7911834B2 (en) *	2006-05-15	2011-03-22	Apple Inc.	Analog interface for a flash memory die
US7511646B2 (en) *	2006-05-15	2009-03-31	Apple Inc.	Use of 8-bit or higher A/D for NAND cell value
US7639531B2 (en) *	2006-05-15	2009-12-29	Apple Inc.	Dynamic cell bit resolution
US7568135B2 (en)	2006-05-15	2009-07-28	Apple Inc.	Use of alternative value in cell detection
US7613043B2 (en) *	2006-05-15	2009-11-03	Apple Inc.	Shifting reference values to account for voltage sag
US7852690B2 (en) *	2006-05-15	2010-12-14	Apple Inc.	Multi-chip package for a flash memory
US7551486B2 (en) *	2006-05-15	2009-06-23	Apple Inc.	Iterative memory cell charging based on reference cell value
US8000134B2 (en)	2006-05-15	2011-08-16	Apple Inc.	Off-die charge pump that supplies multiple flash devices
US7639542B2 (en) *	2006-05-15	2009-12-29	Apple Inc.	Maintenance operations for multi-level data storage cells
US7701797B2 (en) *	2006-05-15	2010-04-20	Apple Inc.	Two levels of voltage regulation supplied for logic and data programming voltage of a memory device
US8130528B2 (en)	2008-08-25	2012-03-06	Sandisk 3D Llc	Memory system with sectional data lines
US8027209B2 (en)	2008-10-06	2011-09-27	Sandisk 3D, Llc	Continuous programming of non-volatile memory
US8279650B2 (en)	2009-04-20	2012-10-02	Sandisk 3D Llc	Memory system with data line switching scheme
US20110088008A1 (en)	2009-10-14	2011-04-14	International Business Machines Corporation	Method for conversion of commercial microprocessor to radiation-hardened processor and resulting processor
US20150262640A1 (en) *	2014-03-11	2015-09-17	Akira Katayama	Memory system
JP2020113347A (ja) *	2019-01-08	2020-07-27	キオクシア株式会社	半導体記憶装置

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS599118B2 (ja) *	1978-12-01	1984-02-29	三菱電機株式会社	電荷移送型半導体装置の電荷レベル検出方法
US5095344A (en) *	1988-06-08	1992-03-10	Eliyahou Harari	Highly compact eprom and flash eeprom devices
US5163021A (en) *	1989-04-13	1992-11-10	Sundisk Corporation	Multi-state EEprom read and write circuits and techniques
US5200920A (en) *	1990-02-08	1993-04-06	Altera Corporation	Method for programming programmable elements in programmable devices
US5218569A (en) *	1991-02-08	1993-06-08	Banks Gerald J	Electrically alterable non-volatile memory with n-bits per memory cell
US5602789A (en) *	1991-03-12	1997-02-11	Kabushiki Kaisha Toshiba	Electrically erasable and programmable non-volatile and multi-level memory systemn with write-verify controller
KR960002006B1 (ko) *	1991-03-12	1996-02-09	가부시끼가이샤 도시바	2개의 기준 레벨을 사용하는 기록 검증 제어기를 갖는 전기적으로 소거 가능하고 프로그램 가능한 불휘발성 메모리 장치
US5412601A (en) *	1992-08-31	1995-05-02	Nippon Steel Corporation	Non-volatile semiconductor memory device capable of storing multi-value data in each memory cell
US5424978A (en) *	1993-03-15	1995-06-13	Nippon Steel Corporation	Non-volatile semiconductor memory cell capable of storing more than two different data and method of using the same
RU2190260C2 (ru) *	1994-06-02	2002-09-27	Интел Корпорейшн	Считывающая схема для флэш-памяти с многоуровневыми ячейками
US5539690A (en) *	1994-06-02	1996-07-23	Intel Corporation	Write verify schemes for flash memory with multilevel cells
US5497354A (en) *	1994-06-02	1996-03-05	Intel Corporation	Bit map addressing schemes for flash memory
US5485422A (en) *	1994-06-02	1996-01-16	Intel Corporation	Drain bias multiplexing for multiple bit flash cell
US5594691A (en) *	1995-02-15	1997-01-14	Intel Corporation	Address transition detection sensing interface for flash memory having multi-bit cells

1993
- 1993-12-28 JP JP35186793A patent/JP3205658B2/ja not_active Ceased
1994
- 1994-12-20 DE DE69424927T patent/DE69424927T2/de not_active Expired - Lifetime
- 1994-12-20 EP EP94120233A patent/EP0661711B1/de not_active Expired - Lifetime
- 1994-12-23 US US08/362,785 patent/US5515321A/en not_active Expired - Lifetime
- 1994-12-26 KR KR1019940036869A patent/KR0145243B1/ko not_active IP Right Cessation
1996
- 1996-02-21 US US08/604,447 patent/US5682347A/en not_active Expired - Lifetime
1997
- 1997-07-09 US US08/890,600 patent/US6144585A/en not_active Expired - Lifetime
2000
- 2000-08-21 US US09/642,081 patent/US6339548B1/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
EP0661711B1 (de)	2000-06-14
KR0145243B1 (ko)	1998-08-17
US5515321A (en)	1996-05-07
EP0661711A1 (de)	1995-07-05
US5682347A (en)	1997-10-28
JP3205658B2 (ja)	2001-09-04
JPH07201189A (ja)	1995-08-04
DE69424927T2 (de)	2001-02-01
US6144585A (en)	2000-11-07
US6339548B1 (en)	2002-01-15
KR950020747A (ko)	1995-07-24

Legal Events

Date

Code

Title

Description

2001-07-05

8364

No opposition during term of opposition

2011-08-25

R081

Change of applicant/patentee

Ref document number: 661711

Country of ref document: EP

Owner name: PEGRE SEMICONDUCTORS LLC, US

Free format text: FORMER OWNER: NIPPON STEEL CORP., TOKIO/TOKYO, JP

Effective date: 20110704