CA2116985C
(en)
*
|
1993-03-11 |
1999-09-21 |
Cynthia J. Burns |
Memory system
|
JP3177094B2
(ja)
*
|
1994-05-31 |
2001-06-18 |
富士通株式会社 |
半導体記憶装置
|
KR0142962B1
(ko)
*
|
1995-05-12 |
1998-08-17 |
김광호 |
계급적 컬럼선택라인구조를 가지는 반도체 메모리 장치
|
US5838631A
(en)
|
1996-04-19 |
1998-11-17 |
Integrated Device Technology, Inc. |
Fully synchronous pipelined ram
|
JPH09288888A
(ja)
*
|
1996-04-22 |
1997-11-04 |
Mitsubishi Electric Corp |
半導体記憶装置
|
US5802005A
(en)
*
|
1996-09-23 |
1998-09-01 |
Texas Instruments Incorporated |
Four bit pre-fetch sDRAM column select architecture
|
KR100499295B1
(ko)
*
|
1996-12-03 |
2006-04-21 |
텍사스 인스트루먼츠 인코포레이티드 |
메모리구성회로및방법
|
US5870347A
(en)
*
|
1997-03-11 |
1999-02-09 |
Micron Technology, Inc. |
Multi-bank memory input/output line selection
|
JPH10334663A
(ja)
*
|
1997-05-30 |
1998-12-18 |
Oki Micro Design Miyazaki:Kk |
半導体記憶装置
|
US6014759A
(en)
*
|
1997-06-13 |
2000-01-11 |
Micron Technology, Inc. |
Method and apparatus for transferring test data from a memory array
|
US6044429A
(en)
|
1997-07-10 |
2000-03-28 |
Micron Technology, Inc. |
Method and apparatus for collision-free data transfers in a memory device with selectable data or address paths
|
US6005822A
(en)
*
|
1997-12-16 |
1999-12-21 |
Texas Instruments Incorporated |
Bank selectable Y-decoder circuit and method of operation
|
US5956288A
(en)
*
|
1997-12-22 |
1999-09-21 |
Emc Corporation |
Modular memory system with shared memory access
|
US5923594A
(en)
*
|
1998-02-17 |
1999-07-13 |
Micron Technology, Inc. |
Method and apparatus for coupling data from a memory device using a single ended read data path
|
US6115320A
(en)
|
1998-02-23 |
2000-09-05 |
Integrated Device Technology, Inc. |
Separate byte control on fully synchronous pipelined SRAM
|
US6405280B1
(en)
|
1998-06-05 |
2002-06-11 |
Micron Technology, Inc. |
Packet-oriented synchronous DRAM interface supporting a plurality of orderings for data block transfers within a burst sequence
|
JP2000030448A
(ja)
*
|
1998-07-15 |
2000-01-28 |
Mitsubishi Electric Corp |
同期型半導体記憶装置
|
EP1050819A1
(de)
*
|
1999-05-03 |
2000-11-08 |
Sgs Thomson Microelectronics Sa |
Speicherzugriff eines Rechners
|
US7069406B2
(en)
*
|
1999-07-02 |
2006-06-27 |
Integrated Device Technology, Inc. |
Double data rate synchronous SRAM with 100% bus utilization
|
US6748480B2
(en)
*
|
1999-12-27 |
2004-06-08 |
Gregory V. Chudnovsky |
Multi-bank, fault-tolerant, high-performance memory addressing system and method
|
US6381669B1
(en)
*
|
1999-12-27 |
2002-04-30 |
Gregory V. Chudnovsky |
Multi-bank, fault-tolerant, high-performance memory addressing system and method
|
JP2002024084A
(ja)
*
|
2000-07-12 |
2002-01-25 |
Mitsubishi Electric Corp |
半導体集積回路装置および電子システム
|
US6445636B1
(en)
*
|
2000-08-17 |
2002-09-03 |
Micron Technology, Inc. |
Method and system for hiding refreshes in a dynamic random access memory
|
JP2002073330A
(ja)
*
|
2000-08-28 |
2002-03-12 |
Mitsubishi Electric Corp |
データ処理装置
|
US20040015645A1
(en)
*
|
2002-07-19 |
2004-01-22 |
Dodd James M. |
System, apparatus, and method for a flexible DRAM architecture
|
KR100437468B1
(ko)
*
|
2002-07-26 |
2004-06-23 |
삼성전자주식회사 |
9의 배수가 되는 데이터 입출력 구조를 반도체 메모리 장치
|
US6962399B2
(en)
*
|
2002-12-30 |
2005-11-08 |
Lexmark International, Inc. |
Method of warning a user of end of life of a consumable for an ink jet printer
|
US8250295B2
(en)
|
2004-01-05 |
2012-08-21 |
Smart Modular Technologies, Inc. |
Multi-rank memory module that emulates a memory module having a different number of ranks
|
US7916574B1
(en)
|
2004-03-05 |
2011-03-29 |
Netlist, Inc. |
Circuit providing load isolation and memory domain translation for memory module
|
US7532537B2
(en)
*
|
2004-03-05 |
2009-05-12 |
Netlist, Inc. |
Memory module with a circuit providing load isolation and memory domain translation
|
US7289386B2
(en)
*
|
2004-03-05 |
2007-10-30 |
Netlist, Inc. |
Memory module decoder
|
US8111566B1
(en)
|
2007-11-16 |
2012-02-07 |
Google, Inc. |
Optimal channel design for memory devices for providing a high-speed memory interface
|
US10013371B2
(en)
|
2005-06-24 |
2018-07-03 |
Google Llc |
Configurable memory circuit system and method
|
US9507739B2
(en)
|
2005-06-24 |
2016-11-29 |
Google Inc. |
Configurable memory circuit system and method
|
US8041881B2
(en)
|
2006-07-31 |
2011-10-18 |
Google Inc. |
Memory device with emulated characteristics
|
US8169233B2
(en)
*
|
2009-06-09 |
2012-05-01 |
Google Inc. |
Programming of DIMM termination resistance values
|
US8359187B2
(en)
*
|
2005-06-24 |
2013-01-22 |
Google Inc. |
Simulating a different number of memory circuit devices
|
US8244971B2
(en)
|
2006-07-31 |
2012-08-14 |
Google Inc. |
Memory circuit system and method
|
US8090897B2
(en)
*
|
2006-07-31 |
2012-01-03 |
Google Inc. |
System and method for simulating an aspect of a memory circuit
|
US7386656B2
(en)
*
|
2006-07-31 |
2008-06-10 |
Metaram, Inc. |
Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
|
US8386722B1
(en)
|
2008-06-23 |
2013-02-26 |
Google Inc. |
Stacked DIMM memory interface
|
US7609567B2
(en)
|
2005-06-24 |
2009-10-27 |
Metaram, Inc. |
System and method for simulating an aspect of a memory circuit
|
US8438328B2
(en)
|
2008-02-21 |
2013-05-07 |
Google Inc. |
Emulation of abstracted DIMMs using abstracted DRAMs
|
US20080082763A1
(en)
*
|
2006-10-02 |
2008-04-03 |
Metaram, Inc. |
Apparatus and method for power management of memory circuits by a system or component thereof
|
US8089795B2
(en)
|
2006-02-09 |
2012-01-03 |
Google Inc. |
Memory module with memory stack and interface with enhanced capabilities
|
US8397013B1
(en)
|
2006-10-05 |
2013-03-12 |
Google Inc. |
Hybrid memory module
|
US8077535B2
(en)
|
2006-07-31 |
2011-12-13 |
Google Inc. |
Memory refresh apparatus and method
|
US8060774B2
(en)
|
2005-06-24 |
2011-11-15 |
Google Inc. |
Memory systems and memory modules
|
US8130560B1
(en)
|
2006-11-13 |
2012-03-06 |
Google Inc. |
Multi-rank partial width memory modules
|
US8081474B1
(en)
|
2007-12-18 |
2011-12-20 |
Google Inc. |
Embossed heat spreader
|
US8327104B2
(en)
*
|
2006-07-31 |
2012-12-04 |
Google Inc. |
Adjusting the timing of signals associated with a memory system
|
US20080028136A1
(en)
*
|
2006-07-31 |
2008-01-31 |
Schakel Keith R |
Method and apparatus for refresh management of memory modules
|
US8796830B1
(en)
|
2006-09-01 |
2014-08-05 |
Google Inc. |
Stackable low-profile lead frame package
|
US8055833B2
(en)
|
2006-10-05 |
2011-11-08 |
Google Inc. |
System and method for increasing capacity, performance, and flexibility of flash storage
|
US9542352B2
(en)
*
|
2006-02-09 |
2017-01-10 |
Google Inc. |
System and method for reducing command scheduling constraints of memory circuits
|
US8335894B1
(en)
|
2008-07-25 |
2012-12-18 |
Google Inc. |
Configurable memory system with interface circuit
|
JP2008544437A
(ja)
*
|
2005-06-24 |
2008-12-04 |
メタラム インコーポレイテッド |
一体化されたメモリコア及びメモリインターフェース回路
|
US20080126690A1
(en)
*
|
2006-02-09 |
2008-05-29 |
Rajan Suresh N |
Memory module with memory stack
|
US9171585B2
(en)
|
2005-06-24 |
2015-10-27 |
Google Inc. |
Configurable memory circuit system and method
|
US7392338B2
(en)
*
|
2006-07-31 |
2008-06-24 |
Metaram, Inc. |
Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
|
US7379316B2
(en)
|
2005-09-02 |
2008-05-27 |
Metaram, Inc. |
Methods and apparatus of stacking DRAMs
|
US9632929B2
(en)
|
2006-02-09 |
2017-04-25 |
Google Inc. |
Translating an address associated with a command communicated between a system and memory circuits
|
US7724589B2
(en)
*
|
2006-07-31 |
2010-05-25 |
Google Inc. |
System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
|
US20080028137A1
(en)
*
|
2006-07-31 |
2008-01-31 |
Schakel Keith R |
Method and Apparatus For Refresh Management of Memory Modules
|
US20080025136A1
(en)
*
|
2006-07-31 |
2008-01-31 |
Metaram, Inc. |
System and method for storing at least a portion of information received in association with a first operation for use in performing a second operation
|
US8209479B2
(en)
*
|
2007-07-18 |
2012-06-26 |
Google Inc. |
Memory circuit system and method
|
DE102007036990B4
(de)
*
|
2007-08-06 |
2013-10-10 |
Qimonda Ag |
Verfahren zum Betrieb einer Speichervorrichtung, Speichereinrichtung und Speichervorrichtung
|
DE102007036989B4
(de)
*
|
2007-08-06 |
2015-02-26 |
Qimonda Ag |
Verfahren zum Betrieb einer Speichervorrichtung, Speichereinrichtung und Speichervorrichtung
|
KR100897276B1
(ko)
*
|
2007-08-10 |
2009-05-14 |
주식회사 하이닉스반도체 |
반도체 메모리 장치
|
US8080874B1
(en)
|
2007-09-14 |
2011-12-20 |
Google Inc. |
Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
|
JP5315739B2
(ja)
*
|
2008-03-21 |
2013-10-16 |
富士通株式会社 |
メモリ装置、メモリ制御方法
|
US8154901B1
(en)
|
2008-04-14 |
2012-04-10 |
Netlist, Inc. |
Circuit providing load isolation and noise reduction
|
US8516185B2
(en)
|
2009-07-16 |
2013-08-20 |
Netlist, Inc. |
System and method utilizing distributed byte-wise buffers on a memory module
|
US8417870B2
(en)
*
|
2009-07-16 |
2013-04-09 |
Netlist, Inc. |
System and method of increasing addressable memory space on a memory board
|
KR100968458B1
(ko)
*
|
2008-10-14 |
2010-07-07 |
주식회사 하이닉스반도체 |
반도체 메모리 장치
|
US9128632B2
(en)
|
2009-07-16 |
2015-09-08 |
Netlist, Inc. |
Memory module with distributed data buffers and method of operation
|
CN105706064B
(zh)
|
2013-07-27 |
2019-08-27 |
奈特力斯股份有限公司 |
具有本地分别同步的内存模块
|