DE69430457D1 - Verfahren zum teilweisen Sägen von intergrierter Schaltkreise - Google Patents

Verfahren zum teilweisen Sägen von intergrierter Schaltkreise

Info

Publication number
DE69430457D1
DE69430457D1 DE69430457T DE69430457T DE69430457D1 DE 69430457 D1 DE69430457 D1 DE 69430457D1 DE 69430457 T DE69430457 T DE 69430457T DE 69430457 T DE69430457 T DE 69430457T DE 69430457 D1 DE69430457 D1 DE 69430457D1
Authority
DE
Germany
Prior art keywords
integrated circuits
partial sawing
sawing
partial
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69430457T
Other languages
English (en)
Other versions
DE69430457T2 (de
Inventor
Michael A Mignardi
Rafael C Alfaro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69430457D1 publication Critical patent/DE69430457D1/de
Publication of DE69430457T2 publication Critical patent/DE69430457T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00865—Multistep processes for the separation of wafers into individual elements
    • B81C1/00896—Temporary protection during separation into individual elements
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
    • B28D5/0011—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing with preliminary treatment, e.g. weakening by scoring
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
    • B28D5/0017—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing using moving tools
    • B28D5/0023—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing using moving tools rectilinearly
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B28—WORKING CEMENT, CLAY, OR STONE
    • B28D—WORKING STONE OR STONE-LIKE MATERIALS
    • B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
    • B28D5/0005—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing
    • B28D5/0041—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing the workpiece being brought into contact with a suitably shaped rigid body which remains stationary during breaking
    • B28D5/0047—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by breaking, e.g. dicing the workpiece being brought into contact with a suitably shaped rigid body which remains stationary during breaking using fluid or gas pressure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/028—Dicing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062—Prior to assembly
    • Y10T156/1064—Partial cutting [e.g., grooving or incising]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T225/00—Severing by tearing or breaking
    • Y10T225/10—Methods
    • Y10T225/12—With preliminary weakening
DE1994630457 1993-01-07 1994-01-07 Verfahren zum teilweisen Sägen von intergrierter Schaltkreise Expired - Fee Related DE69430457T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/001,378 US5393706A (en) 1993-01-07 1993-01-07 Integrated partial sawing process

Publications (2)

Publication Number Publication Date
DE69430457D1 true DE69430457D1 (de) 2002-05-29
DE69430457T2 DE69430457T2 (de) 2002-10-31

Family

ID=21695744

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1994630457 Expired - Fee Related DE69430457T2 (de) 1993-01-07 1994-01-07 Verfahren zum teilweisen Sägen von intergrierter Schaltkreise

Country Status (6)

Country Link
US (2) US5393706A (de)
EP (1) EP0610657B1 (de)
JP (1) JPH0745563A (de)
CA (1) CA2113019C (de)
DE (1) DE69430457T2 (de)
TW (1) TW291570B (de)

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US5597767A (en) * 1995-01-06 1997-01-28 Texas Instruments Incorporated Separation of wafer into die with wafer-level processing
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US5915370A (en) * 1996-03-13 1999-06-29 Micron Technology, Inc. Saw for segmenting a semiconductor wafer
US5872046A (en) * 1996-04-10 1999-02-16 Texas Instruments Incorporated Method of cleaning wafer after partial saw
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Also Published As

Publication number Publication date
EP0610657A2 (de) 1994-08-17
JPH0745563A (ja) 1995-02-14
US5393706A (en) 1995-02-28
TW291570B (de) 1996-11-21
CA2113019C (en) 2005-03-29
DE69430457T2 (de) 2002-10-31
EP0610657A3 (de) 1997-02-05
EP0610657B1 (de) 2002-04-24
CA2113019A1 (en) 1994-07-08
US5527744A (en) 1996-06-18

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee