DE69513113T2 - Verfahren zum synchronen Speicherzugriff - Google Patents
Verfahren zum synchronen SpeicherzugriffInfo
- Publication number
- DE69513113T2 DE69513113T2 DE69513113T DE69513113T DE69513113T2 DE 69513113 T2 DE69513113 T2 DE 69513113T2 DE 69513113 T DE69513113 T DE 69513113T DE 69513113 T DE69513113 T DE 69513113T DE 69513113 T2 DE69513113 T2 DE 69513113T2
- Authority
- DE
- Germany
- Prior art keywords
- memory access
- access method
- synchronous memory
- synchronous
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/14—Protection against unauthorised use of memory or access to memory
- G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
- G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
- G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1694—Configuration of memory controller to different memory types
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
- G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/298,892 US5727005A (en) | 1994-08-31 | 1994-08-31 | Integrated circuit microprocessor with programmable memory access interface types |
| US35376494A | 1994-12-12 | 1994-12-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69513113D1 DE69513113D1 (de) | 1999-12-09 |
| DE69513113T2 true DE69513113T2 (de) | 2000-06-21 |
Family
ID=26970929
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69513113T Expired - Lifetime DE69513113T2 (de) | 1994-08-31 | 1995-08-25 | Verfahren zum synchronen Speicherzugriff |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6079001A (de) |
| EP (1) | EP0700001B1 (de) |
| JP (1) | JPH08166902A (de) |
| KR (1) | KR100391726B1 (de) |
| CN (1) | CN1169064C (de) |
| DE (1) | DE69513113T2 (de) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5017258A (en) * | 1986-06-20 | 1991-05-21 | Shell Oil Company | Pipe rehabilitation using epoxy resin composition |
| US5963609A (en) * | 1996-04-03 | 1999-10-05 | United Microelectronics Corp. | Apparatus and method for serial data communication between plurality of chips in a chip set |
| US6324592B1 (en) | 1997-02-25 | 2001-11-27 | Keystone Aerospace | Apparatus and method for a mobile computer architecture and input/output management system |
| US6289409B1 (en) * | 1998-08-25 | 2001-09-11 | Infineon Technologies North America Corp. | Microcontroller with flexible interface to external devices |
| KR100303780B1 (ko) * | 1998-12-30 | 2001-09-24 | 박종섭 | 디디알 에스디램에서의 데이터 우선 순위 결정 장치 |
| US6973101B1 (en) * | 2000-03-22 | 2005-12-06 | Cypress Semiconductor Corp. | N-way simultaneous framer for bit-interleaved time division multiplexed (TDM) serial bit streams |
| US6314049B1 (en) * | 2000-03-30 | 2001-11-06 | Micron Technology, Inc. | Elimination of precharge operation in synchronous flash memory |
| US6728150B2 (en) * | 2002-02-11 | 2004-04-27 | Micron Technology, Inc. | Method and apparatus for supplementary command bus |
| ITMI20021185A1 (it) * | 2002-05-31 | 2003-12-01 | St Microelectronics Srl | Dispositivo e metodo di lettura per memorie non volatili dotate di almeno un'interfaccia di comunicazione pseudo parallela |
| US7372928B1 (en) * | 2002-11-15 | 2008-05-13 | Cypress Semiconductor Corporation | Method and system of cycle slip framing in a deserializer |
| KR100506062B1 (ko) * | 2002-12-18 | 2005-08-05 | 주식회사 하이닉스반도체 | 복합형 메모리 장치 |
| DE10361059A1 (de) * | 2003-12-22 | 2005-07-28 | Micronas Gmbh | Verfahren und Vorrichtung zum Steuern eines Speicherzugriffs |
| EP2196916A1 (de) * | 2008-12-12 | 2010-06-16 | IHP GmbH-Innovations for High Performance Microelectronics / Leibniz-Institut für innovative Mikroelektronik | GALS-Schaltungsblock und GALS-Schaltungsvorrichtung für einen Burst-Datentransfer |
| JP2011081553A (ja) * | 2009-10-06 | 2011-04-21 | Renesas Electronics Corp | 情報処理装置及びその制御方法 |
| CN102207919A (zh) * | 2010-03-30 | 2011-10-05 | 国际商业机器公司 | 加速数据传输的处理单元、芯片、计算设备和方法 |
| DE102010032198A1 (de) | 2010-07-25 | 2012-01-26 | Elena Lingen | Behandlungsanlage für Regenwasser |
| KR101796116B1 (ko) | 2010-10-20 | 2017-11-10 | 삼성전자 주식회사 | 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법 |
| US20120198181A1 (en) * | 2011-01-31 | 2012-08-02 | Srinjoy Das | System and Method for Managing a Memory as a Circular Buffer |
| CN113468081A (zh) * | 2021-07-01 | 2021-10-01 | 福建信息职业技术学院 | 基于ebi总线的串口转udp的装置及方法 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4851990A (en) * | 1987-02-09 | 1989-07-25 | Advanced Micro Devices, Inc. | High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure |
| US5151986A (en) | 1987-08-27 | 1992-09-29 | Motorola, Inc. | Microcomputer with on-board chip selects and programmable bus stretching |
| JP2752076B2 (ja) * | 1988-02-23 | 1998-05-18 | 株式会社東芝 | プログラマブル・コントローラ |
| JPH0210451A (ja) * | 1988-06-28 | 1990-01-16 | Nec Corp | 半導体記憶装置 |
| JPH03144990A (ja) * | 1989-10-31 | 1991-06-20 | Toshiba Corp | メモリ装置 |
| US5448744A (en) * | 1989-11-06 | 1995-09-05 | Motorola, Inc. | Integrated circuit microprocessor with programmable chip select logic |
| JP2762138B2 (ja) * | 1989-11-06 | 1998-06-04 | 三菱電機株式会社 | メモリコントロールユニット |
| DE69123987T2 (de) * | 1990-01-31 | 1997-04-30 | Hewlett Packard Co | Stossbetrieb für Mikroprozessor mit externem Systemspeicher |
| JPH03248243A (ja) * | 1990-02-26 | 1991-11-06 | Nec Corp | 情報処理装置 |
| US5335334A (en) * | 1990-08-31 | 1994-08-02 | Hitachi, Ltd. | Data processing apparatus having a real memory region with a corresponding fixed memory protection key value and method for allocating memories therefor |
| US5291580A (en) * | 1991-10-04 | 1994-03-01 | Bull Hn Information Systems Inc. | High performance burst read data transfer operation |
| US5367645A (en) * | 1992-06-12 | 1994-11-22 | National Semiconductor Corporation | Modified interface for parallel access EPROM |
| US5418924A (en) * | 1992-08-31 | 1995-05-23 | Hewlett-Packard Company | Memory controller with programmable timing |
| US5469544A (en) * | 1992-11-09 | 1995-11-21 | Intel Corporation | Central processing unit address pipelining |
| US5559992A (en) * | 1993-01-11 | 1996-09-24 | Ascom Autelca Ag | Apparatus and method for protecting data in a memory address range |
| US5511182A (en) * | 1994-08-31 | 1996-04-23 | Motorola, Inc. | Programmable pin configuration logic circuit for providing a chip select signal and related method |
| US5502835A (en) * | 1994-08-31 | 1996-03-26 | Motorola, Inc. | Method for synchronously accessing memory |
-
1995
- 1995-08-25 DE DE69513113T patent/DE69513113T2/de not_active Expired - Lifetime
- 1995-08-25 EP EP95113366A patent/EP0700001B1/de not_active Expired - Lifetime
- 1995-08-28 JP JP7242437A patent/JPH08166902A/ja active Pending
- 1995-08-30 CN CNB951166719A patent/CN1169064C/zh not_active Expired - Lifetime
- 1995-08-31 KR KR1019950028885A patent/KR100391726B1/ko active IP Right Grant
-
1997
- 1997-06-04 US US08/868,622 patent/US6079001A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US6079001A (en) | 2000-06-20 |
| KR960008543A (ko) | 1996-03-22 |
| JPH08166902A (ja) | 1996-06-25 |
| DE69513113D1 (de) | 1999-12-09 |
| KR100391726B1 (ko) | 2003-11-03 |
| CN1139238A (zh) | 1997-01-01 |
| EP0700001B1 (de) | 1999-11-03 |
| CN1169064C (zh) | 2004-09-29 |
| EP0700001A1 (de) | 1996-03-06 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8328 | Change in the person/name/address of the agent |
Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN |
|
| 8327 | Change in the person/name/address of the patent owner |
Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US |