DE69521705D1 - Abtastverfahren für einen flash-speicher mit mehrstufigen zellen - Google Patents

Abtastverfahren für einen flash-speicher mit mehrstufigen zellen

Info

Publication number
DE69521705D1
DE69521705D1 DE69521705T DE69521705T DE69521705D1 DE 69521705 D1 DE69521705 D1 DE 69521705D1 DE 69521705 T DE69521705 T DE 69521705T DE 69521705 T DE69521705 T DE 69521705T DE 69521705 D1 DE69521705 D1 DE 69521705D1
Authority
DE
Germany
Prior art keywords
flash memory
scan procedure
stage cells
cells
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69521705T
Other languages
English (en)
Inventor
E Bauer
Sanjay Talreja
Albert Fazio
Gregory Atwood
Johnny Javanifard
W Frary
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE69521705D1 publication Critical patent/DE69521705D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/563—Multilevel memory reading aspects
    • G11C2211/5632—Multilevel reading using successive approximation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
DE69521705T 1994-06-02 1995-05-18 Abtastverfahren für einen flash-speicher mit mehrstufigen zellen Expired - Lifetime DE69521705D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US25268094A 1994-06-02 1994-06-02
PCT/US1995/006230 WO1995034075A1 (en) 1994-06-02 1995-05-18 Sensing schemes for flash memory with multilevel cells

Publications (1)

Publication Number Publication Date
DE69521705D1 true DE69521705D1 (de) 2001-08-16

Family

ID=22957051

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69521705T Expired - Lifetime DE69521705D1 (de) 1994-06-02 1995-05-18 Abtastverfahren für einen flash-speicher mit mehrstufigen zellen

Country Status (9)

Country Link
US (2) US5828616A (de)
EP (1) EP0763242B1 (de)
KR (1) KR100287979B1 (de)
CN (1) CN1147866C (de)
AU (1) AU2593595A (de)
DE (1) DE69521705D1 (de)
HK (1) HK1011453A1 (de)
RU (1) RU2190260C2 (de)
WO (1) WO1995034075A1 (de)

Families Citing this family (65)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6002614A (en) 1991-02-08 1999-12-14 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
US7071060B1 (en) 1996-02-28 2006-07-04 Sandisk Corporation EEPROM with split gate source side infection with sidewall spacers
US6222762B1 (en) 1992-01-14 2001-04-24 Sandisk Corporation Multi-state memory
JP3205658B2 (ja) * 1993-12-28 2001-09-04 新日本製鐵株式会社 半導体記憶装置の読み出し方法
US5748535A (en) * 1994-10-26 1998-05-05 Macronix International Co., Ltd. Advanced program verify for page mode flash memory
US6353554B1 (en) * 1995-02-27 2002-03-05 Btg International Inc. Memory apparatus including programmable non-volatile multi-bit memory cell, and apparatus and method for demarcating memory states of the cell
US6115285A (en) * 1996-06-14 2000-09-05 Siemens Aktiengesellschaft Device and method for multi-level charge/storage and reading out
US5754469A (en) * 1996-06-14 1998-05-19 Macronix International Co., Ltd. Page mode floating gate memory device storing multiple bits per cell
US5835414A (en) * 1996-06-14 1998-11-10 Macronix International Co., Ltd. Page mode program, program verify, read and erase verify for floating gate memory device with low current page buffer
US6857099B1 (en) * 1996-09-18 2005-02-15 Nippon Steel Corporation Multilevel semiconductor memory, write/read method thereto/therefrom and storage medium storing write/read program
KR100226746B1 (ko) * 1996-12-30 1999-10-15 구본준 다중비트셀의데이타센싱장치및방법
JP3169858B2 (ja) * 1997-06-20 2001-05-28 日本電気アイシーマイコンシステム株式会社 多値型半導体記憶装置
JPH11176178A (ja) * 1997-12-15 1999-07-02 Sony Corp 不揮発性半導体記憶装置およびそれを用いたｉｃメモリカード
JP3165101B2 (ja) * 1998-03-05 2001-05-14 日本電気アイシーマイコンシステム株式会社 多値式半導体メモリ装置およびその不良救済方法
KR100339023B1 (ko) * 1998-03-28 2002-09-18 주식회사 하이닉스반도체 문턱전압을조절할수있는플래쉬메모리장치의센싱회로
US6038166A (en) * 1998-04-01 2000-03-14 Invox Technology High resolution multi-bit-per-cell memory
US5999451A (en) * 1998-07-13 1999-12-07 Macronix International Co., Ltd. Byte-wide write scheme for a page flash device
CA2277717C (en) 1999-07-12 2006-12-05 Mosaid Technologies Incorporated Circuit and method for multiple match detection in content addressable memories
US6188606B1 (en) 1999-08-06 2001-02-13 Advanced Micro Devices, Inc. Multi state sensing of NAND memory cells by varying source bias
US6141244A (en) * 1999-09-02 2000-10-31 Advanced Micro Devices, Inc. Multi level sensing of NAND memory cells by external bias current
US6550028B1 (en) * 1999-10-19 2003-04-15 Advanced Micro Devices, Inc. Array VT mode implementation for a simultaneous operation flash memory device
US6219279B1 (en) * 1999-10-29 2001-04-17 Zilog, Inc. Non-volatile memory program driver and read reference circuits
JP4249352B2 (ja) * 1999-11-09 2009-04-02 富士通株式会社 不揮発性半導体記憶装置
US6292395B1 (en) * 1999-12-30 2001-09-18 Macronix International Co., Ltd. Source and drain sensing
US6363008B1 (en) 2000-02-17 2002-03-26 Multi Level Memory Technology Multi-bit-cell non-volatile memory with maximized data capacity
US7079422B1 (en) 2000-04-25 2006-07-18 Samsung Electronics Co., Ltd. Periodic refresh operations for non-volatile multiple-bit-per-cell memory
US6856568B1 (en) 2000-04-25 2005-02-15 Multi Level Memory Technology Refresh operations that change address mappings in a non-volatile memory
US6396744B1 (en) 2000-04-25 2002-05-28 Multi Level Memory Technology Flash memory with dynamic refresh
DE60037504T2 (de) 2000-05-31 2008-12-11 Stmicroelectronics S.R.L., Agrate Brianza Referenzzellenmatrixanordnung zum Datenlesen in einer nichtflüchtigen Speicheranordnung
DE60039587D1 (de) 2000-05-31 2008-09-04 St Microelectronics Srl Schaltungsanordnung zum Programmieren von Daten in Referenzzellen einer nichtflüchtigen Multibitspeicheranordnung
US6744671B2 (en) * 2000-12-29 2004-06-01 Intel Corporation Kicker for non-volatile memory drain bias
US6570789B2 (en) 2000-12-29 2003-05-27 Intel Corporation Load for non-volatile memory drain bias
US6477086B2 (en) 2000-12-29 2002-11-05 Intel Corporation Local sensing of non-volatile memory
US6535423B2 (en) * 2000-12-29 2003-03-18 Intel Corporation Drain bias for non-volatile memory
US6456540B1 (en) 2001-01-30 2002-09-24 Intel Corporation Method and apparatus for gating a global column select line with address transition detection
DE60136330D1 (de) * 2001-04-10 2008-12-11 St Microelectronics Srl Leseschaltkreis und zugehöriges Verfahren für nichtflüchtigen Mehrpegel-Speicher
TW559814B (en) * 2001-05-31 2003-11-01 Semiconductor Energy Lab Nonvolatile memory and method of driving the same
US6496051B1 (en) * 2001-09-06 2002-12-17 Sharp Laboratories Of America, Inc. Output sense amplifier for a multibit memory cell
US6700815B2 (en) * 2002-04-08 2004-03-02 Advanced Micro Devices, Inc. Refresh scheme for dynamic page programming
US6594181B1 (en) * 2002-05-10 2003-07-15 Fujitsu Limited System for reading a double-bit memory cell
US20030214867A1 (en) * 2002-05-17 2003-11-20 Matthew Goldman Serially sensing the output of multilevel cell arrays
TW564426B (en) * 2002-07-09 2003-12-01 Macronix Int Co Ltd Circuit and method of sensing amplifier with adjustable reference terminal bit line load
US6847550B2 (en) * 2002-10-25 2005-01-25 Nexflash Technologies, Inc. Nonvolatile semiconductor memory having three-level memory cells and program and read mapping circuits therefor
JP4113423B2 (ja) * 2002-12-04 2008-07-09 シャープ株式会社 半導体記憶装置及びリファレンスセルの補正方法
JP2005092923A (ja) * 2003-09-12 2005-04-07 Renesas Technology Corp 半導体記憶装置
JP3924568B2 (ja) * 2004-02-20 2007-06-06 Ｎｅｃエレクトロニクス株式会社 フラッシュメモリにおけるデータアクセス制御方法、データアクセス制御プログラム
ITMI20041988A1 (it) * 2004-10-20 2005-01-20 Atmel Corp "metodo e sistema per la fornitura di rilevazione in un dispositivo di memoria a banchi multipli."
ITMI20042538A1 (it) * 2004-12-29 2005-03-29 Atmel Corp Metodo e sistema per la riduzione del soft-writing in una memoria flash a livelli multipli
KR100666174B1 (ko) * 2005-04-27 2007-01-09 삼성전자주식회사 3-레벨 불휘발성 반도체 메모리 장치 및 이에 대한구동방법
ITMI20051075A1 (it) * 2005-06-10 2006-12-11 Atmel Corp "sistema e metodo per eguagliare la resistenza in una memoria non volatile"
US7656710B1 (en) 2005-07-14 2010-02-02 Sau Ching Wong Adaptive operations for nonvolatile memories
JP4660353B2 (ja) * 2005-11-01 2011-03-30 株式会社東芝 記憶媒体再生装置
US7941590B2 (en) * 2006-11-06 2011-05-10 Marvell World Trade Ltd. Adaptive read and write systems and methods for memory cells
US7400521B1 (en) 2007-01-12 2008-07-15 Qimoda Ag Integrated circuit, memory chip and method of evaluating a memory state of a resistive memory cell
DE102007001859B3 (de) * 2007-01-12 2008-04-24 Qimonda Ag Integrierte Schaltung, Speicherbaustein und Verfahren zum Bestimmen eines Speicherzustands einer resistiven Speicherzelle
KR101261008B1 (ko) * 2007-08-14 2013-05-06 삼성전자주식회사 3-레벨 비휘발성 메모리 셀을 포함하는 비휘발성 메모리장치의 구동 방법 및 그 방법을 사용하는 비휘발성 메모리장치
US8255623B2 (en) * 2007-09-24 2012-08-28 Nvidia Corporation Ordered storage structure providing enhanced access to stored items
US7916537B2 (en) * 2009-06-11 2011-03-29 Seagate Technology Llc Multilevel cell memory devices having reference point cells
CN102081959B (zh) * 2009-11-26 2013-06-12 中国科学院微电子研究所 一种存储器读出电路以及存储器
CN102932611B (zh) * 2012-10-15 2015-10-28 清华大学 一种基于快闪存储器的图像传感器的数据读出电路
CN102932609B (zh) * 2012-10-15 2015-06-24 清华大学 一种基于快闪存储器的图像传感器的数据读取方法
CN102932610B (zh) * 2012-10-15 2016-03-23 清华大学 一种基于快闪存储器的图像传感器阵列结构
US9946495B2 (en) 2013-04-25 2018-04-17 Microsoft Technology Licensing, Llc Dirty data management for hybrid drives
KR20180016854A (ko) * 2016-08-08 2018-02-20 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
US11605434B1 (en) * 2021-08-31 2023-03-14 Micron Technology, Inc. Overwriting at a memory system

Family Cites Families (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3142824A (en) * 1963-10-16 1964-07-28 Control Data Corp Analog storage circuit
US3304103A (en) * 1965-12-22 1967-02-14 Ibm Cut card continuous forms
US3505655A (en) * 1968-06-21 1970-04-07 Ibm Digital storage system operating in the magnitude-time domain
FR2246022B1 (de) * 1973-09-28 1979-06-01 Siemens Ag
US4181980A (en) * 1978-05-15 1980-01-01 Electronic Arrays, Inc. Acquisition and storage of analog signals
US4202044A (en) * 1978-06-13 1980-05-06 International Business Machines Corporation Quaternary FET read only memory
US4287570A (en) * 1979-06-01 1981-09-01 Intel Corporation Multiple bit read-only memory cell and its sense amplifier
IT1224062B (it) * 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
JPS5660247A (en) * 1979-10-22 1981-05-25 Hiraoka Shokusen Soft sheet
US4415992A (en) * 1981-02-25 1983-11-15 Motorola, Inc. Memory system having memory cells capable of storing more than two states
JPS57176598A (en) * 1981-04-20 1982-10-29 Sanyo Electric Co Ltd Write-in circuit for non-volatile analog memory
US4388702A (en) * 1981-08-21 1983-06-14 Mostek Corporation Multi-bit read only memory circuit
US4460982A (en) * 1982-05-20 1984-07-17 Intel Corporation Intelligent electrically programmable and electrically erasable ROM
JPS5949022A (ja) * 1982-09-13 1984-03-21 Toshiba Corp 多値論理回路
JPS6013398A (ja) * 1983-07-04 1985-01-23 Hitachi Ltd 半導体多値記憶装置
DE3472502D1 (en) * 1983-09-16 1988-08-04 Fujitsu Ltd Plural-bit-per-cell read-only memory
US4771404A (en) * 1984-09-05 1988-09-13 Nippon Telegraph And Telephone Corporation Memory device employing multilevel storage circuits
US4701884A (en) * 1985-08-16 1987-10-20 Hitachi, Ltd. Semiconductor memory for serial data access
US5012448A (en) * 1985-12-13 1991-04-30 Ricoh Company, Ltd. Sense amplifier for a ROM having a multilevel memory cell
US4943948A (en) * 1986-06-05 1990-07-24 Motorola, Inc. Program check for a non-volatile memory
US5034922A (en) * 1987-12-21 1991-07-23 Motorola, Inc. Intelligent electrically erasable, programmable read-only memory with improved read latency
US4875188A (en) * 1988-01-12 1989-10-17 Intel Corporation Voltage margining circuit for flash eprom
US5053990A (en) * 1988-02-17 1991-10-01 Intel Corporation Program/erase selection for flash memory
US5222046A (en) * 1988-02-17 1993-06-22 Intel Corporation Processor controlled command port architecture for flash memory
US5293560A (en) * 1988-06-08 1994-03-08 Eliyahou Harari Multi-state flash EEPROM system using incremental programing and erasing methods
US5095344A (en) * 1988-06-08 1992-03-10 Eliyahou Harari Highly compact eprom and flash eeprom devices
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
US4989179A (en) * 1988-07-13 1991-01-29 Information Storage Devices, Inc. High density integrated circuit analog signal recording and playback system
US4890259A (en) * 1988-07-13 1989-12-26 Information Storage Devices High density integrated circuit analog signal recording and playback system
JPH07105146B2 (ja) * 1988-07-29 1995-11-13 三菱電機株式会社 不揮発性記憶装置
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
US5172338B1 (en) * 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
EP0617363B1 (de) * 1989-04-13 2000-01-26 SanDisk Corporation Austausch von fehlerhaften Speicherzellen einer EEprommatritze
FR2650109B1 (fr) * 1989-07-20 1993-04-02 Gemplus Card Int Circuit integre mos a tension de seuil ajustable
US5200920A (en) * 1990-02-08 1993-04-06 Altera Corporation Method for programming programmable elements in programmable devices
US5289406A (en) * 1990-08-28 1994-02-22 Mitsubishi Denki Kabushiki Kaisha Read only memory for storing multi-data
US5126967A (en) * 1990-09-26 1992-06-30 Information Storage Devices, Inc. Writable distributed non-volatile analog reference system and method for analog signal recording and playback
JPH04154212A (ja) * 1990-10-17 1992-05-27 Mitsubishi Electric Corp 半導体記憶装置の出力回路
JP2573416B2 (ja) * 1990-11-28 1997-01-22 株式会社東芝 半導体記憶装置
US5220531A (en) * 1991-01-02 1993-06-15 Information Storage Devices, Inc. Source follower storage cell and improved method and apparatus for iterative write for integrated circuit analog signal recording and playback
JP2680198B2 (ja) * 1991-02-08 1997-11-19 三菱電機株式会社 音声ディジタル１リンク接続方式
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
FR2672709B1 (fr) * 1991-02-11 1994-09-30 Intel Corp Machine d'etat d'ordre.
JP3408552B2 (ja) * 1991-02-11 2003-05-19 インテル・コーポレーション 不揮発性半導体メモリをプログラム及び消去する回路とその方法
US5287305A (en) * 1991-06-28 1994-02-15 Sharp Kabushiki Kaisha Memory device including two-valued/n-valued conversion unit
US5245572A (en) * 1991-07-30 1993-09-14 Intel Corporation Floating gate nonvolatile memory with reading while writing capability
JPH0574181A (ja) * 1991-09-10 1993-03-26 Nec Corp 半導体メモリ装置のデータ読み出し回路
US5237535A (en) * 1991-10-09 1993-08-17 Intel Corporation Method of repairing overerased cells in a flash memory
US5388064A (en) * 1991-11-26 1995-02-07 Information Storage Devices, Inc. Programmable non-volatile analog voltage source devices and methods
US5289412A (en) * 1992-06-19 1994-02-22 Intel Corporation High-speed bias-stabilized current-mirror referencing circuit for non-volatile memories
US5283761A (en) * 1992-07-22 1994-02-01 Mosaid Technologies Incorporated Method of multi-level storage in DRAM
US5375097A (en) * 1993-06-29 1994-12-20 Reddy; Chitranjan N. Segmented bus architecture for improving speed in integrated circuit memories
US5537350A (en) * 1993-09-10 1996-07-16 Intel Corporation Method and apparatus for sequential programming of the bits in a word of a flash EEPROM memory array
US5440505A (en) * 1994-01-21 1995-08-08 Intel Corporation Method and circuitry for storing discrete amounts of charge in a single memory element
US5450363A (en) * 1994-06-02 1995-09-12 Intel Corporation Gray coding for a multilevel cell memory system
US5497354A (en) * 1994-06-02 1996-03-05 Intel Corporation Bit map addressing schemes for flash memory
US5515317A (en) * 1994-06-02 1996-05-07 Intel Corporation Addressing modes for a dynamic single bit per cell to multiple bit per cell memory
US5539690A (en) * 1994-06-02 1996-07-23 Intel Corporation Write verify schemes for flash memory with multilevel cells
US5594691A (en) * 1995-02-15 1997-01-14 Intel Corporation Address transition detection sensing interface for flash memory having multi-bit cells

Also Published As

Publication number Publication date
HK1011453A1 (en) 1999-07-09
RU2190260C2 (ru) 2002-09-27
CN1150494A (zh) 1997-05-21
KR100287979B1 (ko) 2001-05-02
WO1995034075A1 (en) 1995-12-14
US5828616A (en) 1998-10-27
AU2593595A (en) 1996-01-04
EP0763242A4 (de) 1998-08-12
EP0763242A1 (de) 1997-03-19
EP0763242B1 (de) 2001-07-11
US5748546A (en) 1998-05-05
CN1147866C (zh) 2004-04-28

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