DE69522267D1 - Selbstsynchronisierte Schnittstelle - Google Patents
Selbstsynchronisierte SchnittstelleInfo
- Publication number
- DE69522267D1 DE69522267D1 DE69522267T DE69522267T DE69522267D1 DE 69522267 D1 DE69522267 D1 DE 69522267D1 DE 69522267 T DE69522267 T DE 69522267T DE 69522267 T DE69522267 T DE 69522267T DE 69522267 D1 DE69522267 D1 DE 69522267D1
- Authority
- DE
- Germany
- Prior art keywords
- self
- synchronized interface
- synchronized
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
- H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
- G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/261,515 US5832047A (en) | 1994-06-17 | 1994-06-17 | Self timed interface |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69522267D1 true DE69522267D1 (de) | 2001-09-27 |
DE69522267T2 DE69522267T2 (de) | 2002-06-13 |
Family
ID=22993655
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69522267T Expired - Lifetime DE69522267T2 (de) | 1994-06-17 | 1995-02-03 | Selbstsynchronisierte Schnittstelle |
Country Status (6)
Country | Link |
---|---|
US (2) | US5832047A (de) |
EP (1) | EP0687982B1 (de) |
JP (1) | JPH0844667A (de) |
KR (1) | KR100207880B1 (de) |
CA (1) | CA2150744C (de) |
DE (1) | DE69522267T2 (de) |
Families Citing this family (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3490131B2 (ja) | 1994-01-21 | 2004-01-26 | 株式会社ルネサステクノロジ | データ転送制御方法、データプロセッサ及びデータ処理システム |
US5832047A (en) * | 1994-06-17 | 1998-11-03 | International Business Machines Corporation | Self timed interface |
US6202108B1 (en) * | 1997-03-13 | 2001-03-13 | Bull S.A. | Process and system for initializing a serial link between two integrated circuits comprising a parallel-serial port using two clocks with different frequencies |
US6480548B1 (en) * | 1997-11-17 | 2002-11-12 | Silicon Graphics, Inc. | Spacial derivative bus encoder and decoder |
US6262998B1 (en) * | 1997-12-24 | 2001-07-17 | Nortel Networks Limited | Parallel data bus integrated clocking and control |
NO307858B1 (no) * | 1998-05-25 | 2000-06-05 | Ericsson Telefon Ab L M | FremgangsmÕte relatert til klokkeforsinkelseskompensasjon |
US6222380B1 (en) * | 1998-06-15 | 2001-04-24 | International Business Machines Corporation | High speed parallel/serial link for data communication |
US6430242B1 (en) * | 1998-06-15 | 2002-08-06 | International Business Machines Corporation | Initialization system for recovering bits and group of bits from a communications channel |
US6397350B1 (en) * | 1999-02-19 | 2002-05-28 | International Business Machines Corporation | Method of providing direct data processing access using a queued direct input-output device |
ATE343886T1 (de) * | 1999-03-17 | 2006-11-15 | Broadcom Corp | Netzwerkvermittlung |
US7643481B2 (en) * | 1999-03-17 | 2010-01-05 | Broadcom Corporation | Network switch having a programmable counter |
US6611217B2 (en) * | 1999-06-11 | 2003-08-26 | International Business Machines Corporation | Initialization system for recovering bits and group of bits from a communications channel |
US6859454B1 (en) * | 1999-06-30 | 2005-02-22 | Broadcom Corporation | Network switch with high-speed serializing/deserializing hazard-free double data rate switching |
US6462852B1 (en) | 1999-10-28 | 2002-10-08 | International Business Machines Corporation | Selectable low-voltage differential signal/current mode logic (LVDS/CML) receiver with the option of AC or DC coupling |
US7031420B1 (en) | 1999-12-30 | 2006-04-18 | Silicon Graphics, Inc. | System and method for adaptively deskewing parallel data signals relative to a clock |
EP1393238A1 (de) * | 2001-05-03 | 2004-03-03 | Coreoptics, Inc. | Verfahren und vorrichtung zur kompensation von zeitsteuerungsvarianzen in digitalen datenübertragungskanälen |
US6839861B2 (en) * | 2001-07-30 | 2005-01-04 | International Business Machines Corporation | Method and system for selecting data sampling phase for self timed interface logic |
US20030061527A1 (en) * | 2001-09-26 | 2003-03-27 | Intel Corporation | Method and apparatus for realigning bits on a parallel bus |
US6931492B2 (en) * | 2001-11-02 | 2005-08-16 | International Business Machines Corporation | Method for using a portion of the system cache as a trace array |
US7242737B2 (en) * | 2003-07-09 | 2007-07-10 | International Business Machines Corporation | System and method for data phase realignment |
US7292670B2 (en) * | 2003-08-06 | 2007-11-06 | Gennum Corporation | System and method for automatically correcting duty cycle distortion |
US7165195B2 (en) * | 2003-08-15 | 2007-01-16 | Intel Corporation | Method, system, and apparatus for bit error capture and analysis for serial interfaces |
US7440468B2 (en) * | 2003-12-11 | 2008-10-21 | International Business Machines Corporation | Queue management of a global link control byte in an input/output subsystem |
US7440532B1 (en) | 2004-04-21 | 2008-10-21 | Altera Corporation | Bit slip circuitry for serial data signals |
US6984991B2 (en) * | 2004-05-11 | 2006-01-10 | International Business Machines Corporation | Initialization of a bidirectional, self-timed parallel interface with automatic testing of AC differential wire pairs |
JP4456432B2 (ja) * | 2004-08-02 | 2010-04-28 | 富士通株式会社 | 基準信号を用いて同期伝送を行う装置および方法 |
US7103690B2 (en) * | 2004-10-05 | 2006-09-05 | International Business Machines Corporation | Communication between logical macros |
US7684534B2 (en) * | 2005-07-11 | 2010-03-23 | International Business Machines Corporation | Method and apparatus for handling of clock information in serial link ports |
US8189723B2 (en) * | 2008-08-15 | 2012-05-29 | International Business Machines Corporation | Method, circuit, and design structure for capturing data across a pseudo-synchronous interface |
US8300752B2 (en) * | 2008-08-15 | 2012-10-30 | International Business Machines Corporation | Method, circuit, and design structure for capturing data across a pseudo-synchronous interface |
US9170869B2 (en) * | 2012-11-07 | 2015-10-27 | Oracle International Corporation | Switchable per-lane bit error count |
KR101592975B1 (ko) | 2015-08-19 | 2016-02-12 | 위캔메디케어 주식회사 | 외과수술용 견인장치 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4050097A (en) * | 1976-09-27 | 1977-09-20 | Honeywell Information Systems, Inc. | Synchronization technique for data transfers over an asynchronous common bus network coupling data processing apparatus |
DE2936938A1 (de) * | 1979-09-12 | 1981-04-02 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zum ausgleich der phasenunterschiede zwischen dem streckentakt auf einer mit einer pcm-vermittlungsstelle verbindenden pcm-zeitmultiplexleitung und dem amtstakt dieser vermittlungsstelle |
US4694472A (en) * | 1982-04-26 | 1987-09-15 | American Telephone And Telegraph Company | Clock adjustment method and apparatus for synchronous data communications |
US4873703A (en) * | 1985-09-27 | 1989-10-10 | Hewlett-Packard Company | Synchronizing system |
US4771440A (en) * | 1986-12-03 | 1988-09-13 | Cray Research, Inc. | Data modulation interface |
US4873701A (en) * | 1987-09-16 | 1989-10-10 | Penril Corporation | Modem and method for 8 dimensional trellis code modulation |
US5022057A (en) * | 1988-03-11 | 1991-06-04 | Hitachi, Ltd. | Bit synchronization circuit |
US4977582A (en) * | 1988-03-31 | 1990-12-11 | At&T Bell Laboratories | Synchronization of non-continuous digital bit streams |
US4914429A (en) * | 1988-12-09 | 1990-04-03 | Transwitch Corp. | Switch components and multiple data rate non-blocking switch network utilizing the same |
JPH02192337A (ja) * | 1989-01-20 | 1990-07-30 | Fujitsu Ltd | 位相調整回路 |
US4916717A (en) * | 1989-01-23 | 1990-04-10 | Racal Data Communications Inc. | Clock resynchronization mechanism |
JPH03154239A (ja) * | 1989-11-10 | 1991-07-02 | Pioneer Electron Corp | 光ディスクカッティング装置 |
CA2056046C (en) * | 1990-11-27 | 1996-02-27 | Keisuke Okuzono | Interface circuit between a plurality of transmission line and a high bit rate data terminal equipment |
JPH0773286B2 (ja) * | 1991-05-27 | 1995-08-02 | メガソフト株式会社 | データ伝送方法 |
US5313501A (en) * | 1992-06-15 | 1994-05-17 | Digital Equipment Corporation | Method and apparatus for deskewing digital data |
US5392422A (en) * | 1992-06-26 | 1995-02-21 | Sun Microsystems, Inc. | Source synchronized metastable free bus |
CA2120697C (en) * | 1994-04-06 | 1999-08-10 | Vernon Robert Little | Pair division multiplexer for digital communications |
US5832047A (en) * | 1994-06-17 | 1998-11-03 | International Business Machines Corporation | Self timed interface |
-
1994
- 1994-06-17 US US08/261,515 patent/US5832047A/en not_active Expired - Fee Related
-
1995
- 1995-02-03 EP EP95101444A patent/EP0687982B1/de not_active Expired - Lifetime
- 1995-02-03 DE DE69522267T patent/DE69522267T2/de not_active Expired - Lifetime
- 1995-04-24 JP JP9901195A patent/JPH0844667A/ja active Pending
- 1995-05-26 US US08/452,445 patent/US5568526A/en not_active Expired - Lifetime
- 1995-06-01 CA CA002150744A patent/CA2150744C/en not_active Expired - Fee Related
- 1995-06-15 KR KR1019950015848A patent/KR100207880B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR100207880B1 (ko) | 1999-07-15 |
CA2150744A1 (en) | 1995-12-18 |
DE69522267T2 (de) | 2002-06-13 |
EP0687982B1 (de) | 2001-08-22 |
CA2150744C (en) | 2000-08-08 |
JPH0844667A (ja) | 1996-02-16 |
EP0687982A1 (de) | 1995-12-20 |
KR960003177A (ko) | 1996-01-26 |
US5832047A (en) | 1998-11-03 |
US5568526A (en) | 1996-10-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8328 | Change in the person/name/address of the agent |
Representative=s name: DUSCHER, R., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 7 |