DE69523192D1 - Halbleiterbauelement mit isoliertem Gate und Verfahren zu dessen Herstellung - Google Patents

Halbleiterbauelement mit isoliertem Gate und Verfahren zu dessen Herstellung

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Publication number
DE69523192D1
DE69523192D1 DE69523192T DE69523192T DE69523192D1 DE 69523192 D1 DE69523192 D1 DE 69523192D1 DE 69523192 T DE69523192 T DE 69523192T DE 69523192 T DE69523192 T DE 69523192T DE 69523192 D1 DE69523192 D1 DE 69523192D1
Authority
DE
Germany
Prior art keywords
main surface
semiconductor layer
semiconductor
upper main
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69523192T
Other languages
English (en)
Other versions
DE69523192T2 (de
Inventor
Hideki Takahashi
Hidenori Nishihara
Masana Harada
Tadaharu Minato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
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Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69523192D1 publication Critical patent/DE69523192D1/de
Application granted granted Critical
Publication of DE69523192T2 publication Critical patent/DE69523192T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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DE69523192T 1994-02-21 1995-02-09 Halbleiterbauelement mit isoliertem Gate und Verfahren zu dessen Herstellung Expired - Lifetime DE69523192T2 (de)

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EP1120834A2 (de) 2001-08-01
EP0668616A3 (de) 1995-10-11
JPH07235672A (ja) 1995-09-05
KR950026033A (ko) 1995-09-18
US6107650A (en) 2000-08-22
EP1120834A3 (de) 2001-08-22
EP0668616A2 (de) 1995-08-23
DE69523192T2 (de) 2002-07-04
US6331466B1 (en) 2001-12-18
US6323508B1 (en) 2001-11-27
KR100199273B1 (ko) 1999-06-15
EP0668616B1 (de) 2001-10-17

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