DE69617169D1 - Antisicherungsstruktur mit reduziertem leckstrom und herstellungsverfahren - Google Patents

Antisicherungsstruktur mit reduziertem leckstrom und herstellungsverfahren

Info

Publication number
DE69617169D1
DE69617169D1 DE69617169T DE69617169T DE69617169D1 DE 69617169 D1 DE69617169 D1 DE 69617169D1 DE 69617169 T DE69617169 T DE 69617169T DE 69617169 T DE69617169 T DE 69617169T DE 69617169 D1 DE69617169 D1 DE 69617169D1
Authority
DE
Germany
Prior art keywords
manufacturing
leakage current
securing structure
reduced leakage
reduced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69617169T
Other languages
English (en)
Other versions
DE69617169T2 (de
Inventor
John L Mccollum
Frank W Hawley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Microsemi SoC Corp
Original Assignee
Actel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Actel Corp filed Critical Actel Corp
Application granted granted Critical
Publication of DE69617169D1 publication Critical patent/DE69617169D1/de
Publication of DE69617169T2 publication Critical patent/DE69617169T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
DE69617169T 1995-06-06 1996-06-05 Antisicherungsstruktur mit reduziertem leckstrom und herstellungsverfahren Expired - Fee Related DE69617169T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/472,050 US5986322A (en) 1995-06-06 1995-06-06 Reduced leakage antifuse structure
PCT/US1996/009235 WO1996039717A1 (en) 1995-06-06 1996-06-05 Reduced leakage antifuse structure and fabrication method

Publications (2)

Publication Number Publication Date
DE69617169D1 true DE69617169D1 (de) 2002-01-03
DE69617169T2 DE69617169T2 (de) 2002-04-18

Family

ID=23874005

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69617169T Expired - Fee Related DE69617169T2 (de) 1995-06-06 1996-06-05 Antisicherungsstruktur mit reduziertem leckstrom und herstellungsverfahren

Country Status (7)

Country Link
US (2) US5986322A (de)
EP (1) EP0774163B1 (de)
JP (1) JP3051454B2 (de)
KR (1) KR100230158B1 (de)
CA (1) CA2196307A1 (de)
DE (1) DE69617169T2 (de)
WO (1) WO1996039717A1 (de)

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US5789764A (en) * 1995-04-14 1998-08-04 Actel Corporation Antifuse with improved antifuse material
WO1996038861A1 (en) * 1995-06-02 1996-12-05 Actel Corporation Raised tungsten plug antifuse and fabrication process
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US5955751A (en) * 1998-08-13 1999-09-21 Quicklogic Corporation Programmable device having antifuses without programmable material edges and/or corners underneath metal
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US6249010B1 (en) * 1998-08-17 2001-06-19 National Semiconductor Corporation Dielectric-based anti-fuse cell with polysilicon contact plug and method for its manufacture
US7157314B2 (en) * 1998-11-16 2007-01-02 Sandisk Corporation Vertically stacked field programmable nonvolatile memory and method of fabrication
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US8575719B2 (en) 2000-04-28 2013-11-05 Sandisk 3D Llc Silicon nitride antifuse for use in diode-antifuse memory arrays
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US20050090073A1 (en) * 2000-12-20 2005-04-28 Actel Corporation, A California Corporation MOS transistor having improved total radiation-induced leakage current
US6773967B1 (en) * 2002-01-04 2004-08-10 Taiwan Semiconductor Manufacturing Company Method to prevent antifuse Si damage using sidewall spacers
US6657277B1 (en) * 2002-07-19 2003-12-02 United Microelectronics Corporation Method for forming antifuse via structure
US8269203B2 (en) 2009-07-02 2012-09-18 Actel Corporation Resistive RAM devices for programmable logic devices
US10270451B2 (en) 2015-12-17 2019-04-23 Microsemi SoC Corporation Low leakage ReRAM FPGA configuration cell
US10147485B2 (en) 2016-09-29 2018-12-04 Microsemi Soc Corp. Circuits and methods for preventing over-programming of ReRAM-based memory cells
US9990993B2 (en) 2016-09-29 2018-06-05 Microsemi SoC Corporation Three-transistor resistive random access memory cells
US9704573B1 (en) 2016-09-30 2017-07-11 Microsemi SoC Corporation Three-transistor resistive random access memory cells
WO2018106450A1 (en) 2016-12-09 2018-06-14 Microsemi Soc Corp. Resistive random access memory cell
KR20180085120A (ko) 2017-01-17 2018-07-26 삼성전자주식회사 반도체 메모리 장치
CN111033624B (zh) 2017-08-11 2023-10-03 美高森美SoC公司 用于对电阻随机存取存储器设备进行编程的电路和方法
KR102018318B1 (ko) * 2018-09-11 2019-09-04 주식회사 유진테크 박막 형성 방법
US11541204B2 (en) 2018-09-26 2023-01-03 W. L. Gore & Associates, Inc. Cyclic expansion tissue treatment programs and associated systems
US10763210B2 (en) * 2019-01-03 2020-09-01 International Business Machines Corporation Circular ring shaped antifuse device

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Also Published As

Publication number Publication date
EP0774163A1 (de) 1997-05-21
KR970705175A (ko) 1997-09-06
DE69617169T2 (de) 2002-04-18
CA2196307A1 (en) 1996-12-12
JP3051454B2 (ja) 2000-06-12
US5763299A (en) 1998-06-09
US5986322A (en) 1999-11-16
JPH10503062A (ja) 1998-03-17
KR100230158B1 (ko) 1999-11-15
WO1996039717A1 (en) 1996-12-12
EP0774163B1 (de) 2001-11-21

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