DE69625768T2 - Cache-Speicher mit maximalem gleichzeitigem Nachschlag für Rechneranordnungen mit Vielfaden-Umgebung - Google Patents

Cache-Speicher mit maximalem gleichzeitigem Nachschlag für Rechneranordnungen mit Vielfaden-Umgebung

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Publication number
DE69625768T2
DE69625768T2 DE69625768T DE69625768T DE69625768T2 DE 69625768 T2 DE69625768 T2 DE 69625768T2 DE 69625768 T DE69625768 T DE 69625768T DE 69625768 T DE69625768 T DE 69625768T DE 69625768 T2 DE69625768 T2 DE 69625768T2
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DE
Germany
Prior art keywords
cache memory
thread environment
maximum simultaneous
computer arrangements
simultaneous lookup
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69625768T
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English (en)
Other versions
DE69625768D1 (de
Inventor
Thomas K Wong
Theron D Tock
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Sun Microsystems Inc
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Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69625768D1 publication Critical patent/DE69625768D1/de
Application granted granted Critical
Publication of DE69625768T2 publication Critical patent/DE69625768T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
DE69625768T 1995-10-13 1996-10-10 Cache-Speicher mit maximalem gleichzeitigem Nachschlag für Rechneranordnungen mit Vielfaden-Umgebung Expired - Fee Related DE69625768T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/543,105 US5701432A (en) 1995-10-13 1995-10-13 Multi-threaded processing system having a cache that is commonly accessible to each thread

Publications (2)

Publication Number Publication Date
DE69625768D1 DE69625768D1 (de) 2003-02-20
DE69625768T2 true DE69625768T2 (de) 2003-09-18

Family

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Application Number Title Priority Date Filing Date
DE69625768T Expired - Fee Related DE69625768T2 (de) 1995-10-13 1996-10-10 Cache-Speicher mit maximalem gleichzeitigem Nachschlag für Rechneranordnungen mit Vielfaden-Umgebung

Country Status (7)

Country Link
US (2) US5701432A (de)
EP (1) EP0768608B1 (de)
JP (1) JPH09204357A (de)
KR (1) KR970022764A (de)
CN (1) CN1087451C (de)
DE (1) DE69625768T2 (de)
TW (1) TW324081B (de)

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Also Published As

Publication number Publication date
EP0768608A2 (de) 1997-04-16
EP0768608B1 (de) 2003-01-15
CN1155121A (zh) 1997-07-23
EP0768608A3 (de) 1998-08-12
CN1087451C (zh) 2002-07-10
JPH09204357A (ja) 1997-08-05
US5909695A (en) 1999-06-01
US5701432A (en) 1997-12-23
KR970022764A (ko) 1997-05-30
DE69625768D1 (de) 2003-02-20
TW324081B (en) 1998-01-01

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