DE69637900D1 - Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren - Google Patents

Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren

Info

Publication number
DE69637900D1
DE69637900D1 DE69637900T DE69637900T DE69637900D1 DE 69637900 D1 DE69637900 D1 DE 69637900D1 DE 69637900 T DE69637900 T DE 69637900T DE 69637900 T DE69637900 T DE 69637900T DE 69637900 D1 DE69637900 D1 DE 69637900D1
Authority
DE
Germany
Prior art keywords
resin
manufacturing
semiconductor device
molded semiconductor
molded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69637900T
Other languages
English (en)
Inventor
Tetsuya Ootsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Application granted granted Critical
Publication of DE69637900D1 publication Critical patent/DE69637900D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48253—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a potential ring of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10162—Shape being a cuboid with a square active surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
DE69637900T 1995-02-27 1996-02-26 Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren Expired - Lifetime DE69637900D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3877695 1995-02-27
JP32384795A JP3542677B2 (ja) 1995-02-27 1995-11-16 樹脂封止型半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
DE69637900D1 true DE69637900D1 (de) 2009-05-28

Family

ID=26378064

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69637900T Expired - Lifetime DE69637900D1 (de) 1995-02-27 1996-02-26 Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren

Country Status (8)

Country Link
US (1) US5801435A (de)
EP (1) EP0729181B1 (de)
JP (1) JP3542677B2 (de)
KR (1) KR100414450B1 (de)
CN (1) CN1093984C (de)
DE (1) DE69637900D1 (de)
SG (1) SG38933A1 (de)
TW (2) TW562245U (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5808357A (en) * 1992-06-02 1998-09-15 Fujitsu Limited Semiconductor device having resin encapsulated package structure
JP2891184B2 (ja) * 1996-06-13 1999-05-17 日本電気株式会社 半導体装置及びその製造方法
TW383508B (en) * 1996-07-29 2000-03-01 Nichia Kagaku Kogyo Kk Light emitting device and display
FR2764114B1 (fr) * 1997-06-02 2003-04-25 Sgs Thomson Microelectronics Dispositif semi-conducteur muni d'un dissipateur thermique
US6319757B1 (en) * 1998-07-08 2001-11-20 Caldus Semiconductor, Inc. Adhesion and/or encapsulation of silicon carbide-based semiconductor devices on ceramic substrates
JP3128548B2 (ja) 1999-03-11 2001-01-29 沖電気工業株式会社 半導体装置および半導体装置の製造方法
US6198163B1 (en) * 1999-10-18 2001-03-06 Amkor Technology, Inc. Thin leadframe-type semiconductor package having heat sink with recess and exposed surface
US20030211062A1 (en) * 2001-05-07 2003-11-13 Karl Laden Anhydrous skin cleaners
US6396130B1 (en) 2001-09-14 2002-05-28 Amkor Technology, Inc. Semiconductor package having multiple dies with independently biased back surfaces
JP2003258141A (ja) * 2002-02-27 2003-09-12 Nec Compound Semiconductor Devices Ltd 電子部品及びその製造方法
JP3566269B2 (ja) * 2002-06-07 2004-09-15 富士通株式会社 リードフレーム及びその製造方法、及び半導体装置。
JP2004349347A (ja) 2003-05-20 2004-12-09 Rohm Co Ltd 半導体装置
US7919853B1 (en) * 2007-11-01 2011-04-05 Amkor Technology, Inc. Semiconductor package and fabrication method thereof
JP2013183022A (ja) * 2012-03-01 2013-09-12 Toyota Industries Corp 半導体装置および半導体装置の製造方法
JP2013183023A (ja) * 2012-03-01 2013-09-12 Toyota Industries Corp 電力変換装置
JP5308595B1 (ja) * 2012-11-28 2013-10-09 新電元工業株式会社 樹脂封止型半導体装置の製造方法及び樹脂封止型半導体装置
JP6416996B1 (ja) * 2017-07-24 2018-10-31 アサヒ・エンジニアリング株式会社 樹脂封止装置用の封止型
JP7024349B2 (ja) * 2017-11-24 2022-02-24 セイコーエプソン株式会社 センサーユニット、センサーユニットの製造方法、慣性計測装置、電子機器、および移動体

Family Cites Families (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL280148A (de) * 1961-06-26
US3290564A (en) * 1963-02-26 1966-12-06 Texas Instruments Inc Semiconductor device
US3965277A (en) * 1972-05-09 1976-06-22 Massachusetts Institute Of Technology Photoformed plated interconnection of embedded integrated circuit chips
JPS52124865A (en) * 1976-04-13 1977-10-20 Sharp Corp Semiconductor device
JPS54124678A (en) * 1978-03-20 1979-09-27 Nec Corp Lead frame
JPS56122134A (en) * 1980-02-29 1981-09-25 Toshiba Corp Resin-sealed type semiconductor device
JPS5812341A (ja) * 1981-07-16 1983-01-24 Toshiba Corp 半導体装置
JPS59207645A (ja) * 1983-05-11 1984-11-24 Toshiba Corp 半導体装置およびリ−ドフレ−ム
JPS60103651A (ja) * 1983-11-11 1985-06-07 Hitachi Ltd 半導体装置
EP0164794B1 (de) * 1984-06-14 1990-07-25 Advanced Micro Devices, Inc. Mehrschicht-Wärmesenkpackung für integrierte Schaltung
JPS61166051A (ja) * 1985-01-17 1986-07-26 Matsushita Electronics Corp 樹脂封止型半導体装置
JPS6297358A (ja) * 1985-10-23 1987-05-06 Mitsubishi Electric Corp 樹脂封止形半導体集積回路装置
US4684975A (en) * 1985-12-16 1987-08-04 National Semiconductor Corporation Molded semiconductor package having improved heat dissipation
JPS63179557A (ja) * 1987-01-20 1988-07-23 Nec Corp 半導体装置用リ−ドフレ−ム
JPS63240053A (ja) * 1987-03-27 1988-10-05 Mitsubishi Electric Corp 半導体装置
US4942497A (en) * 1987-07-24 1990-07-17 Nec Corporation Cooling structure for heat generating electronic components mounted on a substrate
US4903118A (en) * 1988-03-30 1990-02-20 Director General, Agency Of Industrial Science And Technology Semiconductor device including a resilient bonding resin
JPH023390A (ja) * 1988-06-15 1990-01-08 Brother Ind Ltd 画像転写形成方法及び画像転写物
US5050040A (en) * 1988-10-21 1991-09-17 Texas Instruments Incorporated Composite material, a heat-dissipating member using the material in a circuit system, the circuit system
JP2593702B2 (ja) * 1988-11-09 1997-03-26 株式会社日立製作所 半導体装置の製造方法
US5157478A (en) * 1989-04-19 1992-10-20 Mitsubishi Denki Kabushiki Kaisha Tape automated bonding packaged semiconductor device incorporating a heat sink
JPH02307251A (ja) * 1989-05-22 1990-12-20 Nec Corp 樹脂封止型半導体装置
US5208188A (en) * 1989-10-02 1993-05-04 Advanced Micro Devices, Inc. Process for making a multilayer lead frame assembly for an integrated circuit structure and multilayer integrated circuit die package formed by such process
JPH03149865A (ja) * 1989-11-07 1991-06-26 Matsushita Electron Corp リードフレーム
JPH0719876B2 (ja) * 1989-12-04 1995-03-06 株式会社東芝 半導体装置
JP2517691B2 (ja) * 1990-01-29 1996-07-24 三菱電機株式会社 半導体装置及びその製造方法
JPH03265161A (ja) * 1990-03-15 1991-11-26 Toshiba Corp 樹脂封止型半導体装置
JP2886250B2 (ja) * 1990-03-26 1999-04-26 株式会社日立製作所 半導体装置
JP2850462B2 (ja) * 1990-03-29 1999-01-27 セイコーエプソン株式会社 半導体装置及びその製造方法
JPH0410558A (ja) * 1990-04-27 1992-01-14 Hitachi Ltd 放熱体付き半導体装置
JPH0411758A (ja) * 1990-04-28 1992-01-16 Mitsubishi Electric Corp 半導体装置
JPH0427145A (ja) * 1990-05-22 1992-01-30 Seiko Epson Corp 半導体装置
US5227662A (en) * 1990-05-24 1993-07-13 Nippon Steel Corporation Composite lead frame and semiconductor device using the same
DE4017697C2 (de) * 1990-06-01 2003-12-11 Bosch Gmbh Robert Elektronisches Bauelement, Verfahren zu dessen Herstellung und Verwendung
US5202288A (en) * 1990-06-01 1993-04-13 Robert Bosch Gmbh Method of manufacturing an electronic circuit component incorporating a heat sink
JP2983620B2 (ja) * 1990-07-20 1999-11-29 株式会社日立製作所 半導体装置及びその製造方法
JP3047986B2 (ja) * 1990-07-25 2000-06-05 株式会社日立製作所 半導体装置
JP2725448B2 (ja) * 1990-08-01 1998-03-11 三菱電機株式会社 半導体装置
US5105259A (en) * 1990-09-28 1992-04-14 Motorola, Inc. Thermally enhanced semiconductor device utilizing a vacuum to ultimately enhance thermal dissipation
JPH04158556A (ja) * 1990-10-22 1992-06-01 Toshiba Corp 樹脂封止型半導体装置
JPH04162556A (ja) * 1990-10-25 1992-06-08 Mitsubishi Electric Corp リードフレーム及びその製造方法
JP2841854B2 (ja) * 1990-11-29 1998-12-24 セイコーエプソン株式会社 半導体装置
JPH04316357A (ja) * 1991-04-15 1992-11-06 Sony Corp 樹脂封止型半導体装置
US5172213A (en) * 1991-05-23 1992-12-15 At&T Bell Laboratories Molded circuit package having heat dissipating post
DE69231790T2 (de) * 1991-07-01 2002-03-07 Sumitomo Electric Industries Wärmeabführendes Bauteil und damit versehene Halbleitervorrichtung
JPH05308107A (ja) * 1991-07-01 1993-11-19 Sumitomo Electric Ind Ltd 半導体装置及びその製作方法
US5200809A (en) * 1991-09-27 1993-04-06 Vlsi Technology, Inc. Exposed die-attach heatsink package
JP2602380B2 (ja) * 1991-10-23 1997-04-23 富士通株式会社 半導体装置及びその製造方法
JPH05211262A (ja) * 1992-01-08 1993-08-20 Nec Corp 樹脂封止型半導体装置
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5262927A (en) * 1992-02-07 1993-11-16 Lsi Logic Corporation Partially-molded, PCB chip carrier package
JPH06120374A (ja) * 1992-03-31 1994-04-28 Amkor Electron Inc 半導体パッケージ構造、半導体パッケージ方法及び半導体パッケージ用放熱板
JP3572628B2 (ja) * 1992-06-03 2004-10-06 セイコーエプソン株式会社 半導体装置及びその製造方法
JP3322429B2 (ja) * 1992-06-04 2002-09-09 新光電気工業株式会社 半導体装置
US5367196A (en) * 1992-09-17 1994-11-22 Olin Corporation Molded plastic semiconductor package including an aluminum alloy heat spreader
JPH0697326A (ja) * 1992-09-14 1994-04-08 Apic Yamada Kk 半導体装置およびその放熱部材
JPH06295962A (ja) * 1992-10-20 1994-10-21 Ibiden Co Ltd 電子部品搭載用基板およびその製造方法並びに電子部品搭載装置
JPH06132444A (ja) * 1992-10-20 1994-05-13 Hitachi Ltd 半導体装置
JP3304447B2 (ja) * 1992-11-17 2002-07-22 イビデン株式会社 電子部品搭載用基板
JP3509274B2 (ja) * 1994-07-13 2004-03-22 セイコーエプソン株式会社 樹脂封止型半導体装置およびその製造方法

Also Published As

Publication number Publication date
US5801435A (en) 1998-09-01
CN1136711A (zh) 1996-11-27
SG38933A1 (en) 1997-04-17
TW387134B (en) 2000-04-11
EP0729181B1 (de) 2009-04-15
CN1093984C (zh) 2002-11-06
JP3542677B2 (ja) 2004-07-14
TW562245U (en) 2003-11-11
EP0729181A3 (de) 1997-08-27
KR100414450B1 (ko) 2004-04-03
JPH08298302A (ja) 1996-11-12
EP0729181A2 (de) 1996-08-28

Similar Documents

Publication Publication Date Title
DE59601335D1 (de) Halbleiterbauelement und Herstellverfahren
KR960009110A (ko) 반도체 장치 및 그 제조방법
DE69430513D1 (de) Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren
DE69527330T2 (de) Halbleiteranordnung und Herstellungsverfahren
DE69635397D1 (de) Halbleitervorrichtung mit Chipabmessungen und Herstellungsverfahren
KR960009107A (ko) 반도체장치와 그 제조방법
DE69721411D1 (de) Halbleiteranordnung und Herstellungsverfahren dafür
DE69522514D1 (de) Halbleiteranordnung und Herstellungsverfahren
DE69526539D1 (de) Halbleiteranordnung und Herstellungsverfahren
DE69525795D1 (de) Halbleiteranordnung und Herstellungsverfahren
DE69435205D1 (de) Dünne Halbleitervorrichtung und Herstellungsverfahren
DE69533511D1 (de) Lichtemittierende halbleitervorrichtung und herstellungsverfahren
DE69737588D1 (de) Halbleiteranordnung und Herstellungsverfahren dafür
DE69413602D1 (de) Halbleiteranordnung und Herstellungsverfahren
DE69323127T2 (de) Halbleitervorrichtung und Herstellungsverfahren
KR960015900A (ko) 반도체 장치 및 그 제조방법
DE69526543D1 (de) Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren
KR970004015A (ko) 반도체장치 및 그의 제조방법
DE69424728T2 (de) Halbleiteranordnung und zugehörige Herstellungsmethode
DE69325343T2 (de) Halbleiteranordnung und Herstellungsverfahren dafür
KR960012574A (ko) 반도체장치 제조방법
DE69637900D1 (de) Harzvergossenes Halbleiterbauteil und dessen Herstellungsverfahren
KR960012313A (ko) 반도체 장치 및 그 제조방법
FI954241A (fi) Puolijohdelaitteen valmistusmenetelmä
DE69528798D1 (de) CMOS-Halbleiterbauelement und Herstellungsverfahren

Legal Events

Date Code Title Description
8364 No opposition during term of opposition