DE69701852D1 - Lernverfahren das für datenklassifizierung kleine neuronale netze generiert - Google Patents

Lernverfahren das für datenklassifizierung kleine neuronale netze generiert

Info

Publication number
DE69701852D1
DE69701852D1 DE69701852T DE69701852T DE69701852D1 DE 69701852 D1 DE69701852 D1 DE 69701852D1 DE 69701852 T DE69701852 T DE 69701852T DE 69701852 T DE69701852 T DE 69701852T DE 69701852 D1 DE69701852 D1 DE 69701852D1
Authority
DE
Germany
Prior art keywords
learning process
data classification
generates small
neuronal networks
small neuronal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69701852T
Other languages
English (en)
Other versions
DE69701852T2 (de
Inventor
Beatriz Gordon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Centre National de la Recherche Scientifique CNRS
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Centre National de la Recherche Scientifique CNRS
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Centre National de la Recherche Scientifique CNRS, Commissariat a lEnergie Atomique CEA filed Critical Centre National de la Recherche Scientifique CNRS
Publication of DE69701852D1 publication Critical patent/DE69701852D1/de
Application granted granted Critical
Publication of DE69701852T2 publication Critical patent/DE69701852T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G06N3/082—Learning methods modifying the architecture, e.g. adding, deleting or silencing nodes or connections
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F18/00—Pattern recognition
    • G06F18/20—Analysing
    • G06F18/24—Classification techniques
    • G06F18/241—Classification techniques relating to the classification model, e.g. parametric or non-parametric approaches
    • G06F18/2413—Classification techniques relating to the classification model, e.g. parametric or non-parametric approaches based on distances to training or reference patterns
DE69701852T 1996-11-18 1997-11-17 Lernverfahren das für datenklassifizierung kleine neuronale netze generiert Expired - Fee Related DE69701852T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9614022A FR2756073B1 (fr) 1996-11-18 1996-11-18 Procede d'apprentissage generant des reseaux de neurones de petites tailles pour la classification de donnees
PCT/FR1997/002060 WO1998022883A1 (fr) 1996-11-18 1997-11-17 Procede d'apprentissage generant des reseaux de neurones de petites tailles pour la classification de donnees

Publications (2)

Publication Number Publication Date
DE69701852D1 true DE69701852D1 (de) 2000-06-08
DE69701852T2 DE69701852T2 (de) 2000-12-07

Family

ID=9497710

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69701852T Expired - Fee Related DE69701852T2 (de) 1996-11-18 1997-11-17 Lernverfahren das für datenklassifizierung kleine neuronale netze generiert

Country Status (5)

Country Link
US (1) US6421654B1 (de)
EP (1) EP0875032B1 (de)
DE (1) DE69701852T2 (de)
FR (1) FR2756073B1 (de)
WO (1) WO1998022883A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030023575A1 (en) * 2001-04-16 2003-01-30 Vladimir Shlain System and method of automatic object classification by tournament strategy
US7421415B2 (en) * 2004-09-07 2008-09-02 Siemens Corporate Research, Inc. Methods and systems for 3D object detection using learning
US7814038B1 (en) 2007-12-06 2010-10-12 Dominic John Repici Feedback-tolerant method and device producing weight-adjustment factors for pre-synaptic neurons in artificial neural networks
US20090276385A1 (en) * 2008-04-30 2009-11-05 Stanley Hill Artificial-Neural-Networks Training Artificial-Neural-Networks
US9235799B2 (en) * 2011-11-26 2016-01-12 Microsoft Technology Licensing, Llc Discriminative pretraining of deep neural networks
US9477925B2 (en) * 2012-11-20 2016-10-25 Microsoft Technology Licensing, Llc Deep neural networks training for speech and pattern recognition
JP6164639B2 (ja) * 2013-05-23 2017-07-19 国立研究開発法人情報通信研究機構 ディープ・ニューラルネットワークの学習方法、及びコンピュータプログラム
JP5777178B2 (ja) * 2013-11-27 2015-09-09 国立研究開発法人情報通信研究機構 統計的音響モデルの適応方法、統計的音響モデルの適応に適した音響モデルの学習方法、ディープ・ニューラル・ネットワークを構築するためのパラメータを記憶した記憶媒体、及び統計的音響モデルの適応を行なうためのコンピュータプログラム
US10600691B2 (en) 2016-10-07 2020-03-24 Xcelsis Corporation 3D chip sharing power interconnect layer
US10580757B2 (en) 2016-10-07 2020-03-03 Xcelsis Corporation Face-to-face mounted IC dies with orthogonal top interconnect layers
US10580735B2 (en) 2016-10-07 2020-03-03 Xcelsis Corporation Stacked IC structure with system level wiring on multiple sides of the IC die
WO2018067719A2 (en) 2016-10-07 2018-04-12 Invensas Bonding Technologies, Inc. Direct-bonded native interconnects and active base die
US10762420B2 (en) 2017-08-03 2020-09-01 Xcelsis Corporation Self repairing neural network
US10672745B2 (en) 2016-10-07 2020-06-02 Xcelsis Corporation 3D processor
US10672663B2 (en) 2016-10-07 2020-06-02 Xcelsis Corporation 3D chip sharing power circuit
WO2019030895A1 (ja) * 2017-08-10 2019-02-14 三菱電機株式会社 識別分類装置および識別分類方法
US11599299B2 (en) 2019-11-19 2023-03-07 Invensas Llc 3D memory circuit
WO2022008032A1 (en) * 2020-07-06 2022-01-13 Huawei Technologies Co., Ltd. Construction of binary neural networks

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69314293T2 (de) * 1992-12-16 1998-04-02 Koninkl Philips Electronics Nv Neuronalanlage und -Bauverfahren

Also Published As

Publication number Publication date
EP0875032A1 (de) 1998-11-04
FR2756073A1 (fr) 1998-05-22
US6421654B1 (en) 2002-07-16
WO1998022883A1 (fr) 1998-05-28
DE69701852T2 (de) 2000-12-07
EP0875032B1 (de) 2000-05-03
FR2756073B1 (fr) 1999-01-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee