DE69721640D1 - Multiprozessor-Rechnersystem und Verfahren zur Steuerung des Verkehrsflusses - Google Patents
Multiprozessor-Rechnersystem und Verfahren zur Steuerung des VerkehrsflussesInfo
- Publication number
- DE69721640D1 DE69721640D1 DE69721640T DE69721640T DE69721640D1 DE 69721640 D1 DE69721640 D1 DE 69721640D1 DE 69721640 T DE69721640 T DE 69721640T DE 69721640 T DE69721640 T DE 69721640T DE 69721640 D1 DE69721640 D1 DE 69721640D1
- Authority
- DE
- Germany
- Prior art keywords
- traffic
- controlling
- flow
- computer system
- multiprocessor computer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0815—Cache consistency protocols
- G06F12/0817—Cache consistency protocols using directory methods
- G06F12/0828—Cache consistency protocols using directory methods with concurrent directory accessing, i.e. handling multiple concurrent coherency transactions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
- G06F12/0813—Multiuser, multiprocessor or multiprocessing cache systems with a network or matrix configuration
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/27—Using a specific cache architecture
- G06F2212/272—Cache only memory architecture [COMA]
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/674,358 US6141692A (en) | 1996-07-01 | 1996-07-01 | Directory-based, shared-memory, scaleable multiprocessor computer system having deadlock-free transaction flow sans flow control protocol |
US674358 | 1996-07-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69721640D1 true DE69721640D1 (de) | 2003-06-12 |
DE69721640T2 DE69721640T2 (de) | 2004-03-11 |
Family
ID=24706282
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69721640T Expired - Fee Related DE69721640T2 (de) | 1996-07-01 | 1997-06-23 | Multiprozessor-Rechnersystem und Verfahren zur Steuerung des Verkehrsflusses |
Country Status (3)
Country | Link |
---|---|
US (1) | US6141692A (de) |
EP (1) | EP0817062B1 (de) |
DE (1) | DE69721640T2 (de) |
Families Citing this family (60)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2728559B1 (fr) * | 1994-12-23 | 1997-01-31 | Saint Gobain Vitrage | Substrats en verre revetus d'un empilement de couches minces a proprietes de reflexion dans l'infrarouge et/ou dans le domaine du rayonnement solaire |
US6092155A (en) * | 1997-07-10 | 2000-07-18 | International Business Machines Corporation | Cache coherent network adapter for scalable shared memory processing systems |
US6826651B2 (en) * | 1998-05-29 | 2004-11-30 | International Business Machines Corporation | State-based allocation and replacement for improved hit ratio in directory caches |
US6081874A (en) * | 1998-09-29 | 2000-06-27 | International Business Machines Corporation | Non-uniform memory access (NUMA) data processing system that speculatively issues requests on a node interconnect |
US6978312B2 (en) * | 1998-12-18 | 2005-12-20 | Microsoft Corporation | Adaptive flow control protocol |
US6658469B1 (en) * | 1998-12-18 | 2003-12-02 | Microsoft Corporation | Method and system for switching between network transport providers |
US6393590B1 (en) * | 1998-12-22 | 2002-05-21 | Nortel Networks Limited | Method and apparatus for ensuring proper functionality of a shared memory, multiprocessor system |
US6341338B1 (en) * | 1999-02-04 | 2002-01-22 | Sun Microsystems, Inc. | Protocol for coordinating the distribution of shared memory |
US6976083B1 (en) | 1999-02-19 | 2005-12-13 | International Business Machines Corporation | Apparatus for providing direct data processing access using a queued direct input-output device |
US6345241B1 (en) * | 1999-02-19 | 2002-02-05 | International Business Machines Corporation | Method and apparatus for simulation of data in a virtual environment using a queued direct input-output device |
US6678773B2 (en) | 2000-01-13 | 2004-01-13 | Motorola, Inc. | Bus protocol independent method and structure for managing transaction priority, ordering and deadlocks in a multi-processing system |
US7454457B1 (en) * | 2000-02-07 | 2008-11-18 | Parallel Networks, Llc | Method and apparatus for dynamic data flow control using prioritization of data requests |
US7058723B2 (en) * | 2000-03-14 | 2006-06-06 | Adaptec, Inc. | Congestion control for internet protocol storage |
US6647546B1 (en) | 2000-05-03 | 2003-11-11 | Sun Microsystems, Inc. | Avoiding gather and scatter when calling Fortran 77 code from Fortran 90 code |
US6802057B1 (en) | 2000-05-03 | 2004-10-05 | Sun Microsystems, Inc. | Automatic generation of fortran 90 interfaces to fortran 77 code |
US7330904B1 (en) * | 2000-06-07 | 2008-02-12 | Network Appliance, Inc. | Communication of control information and data in client/server systems |
US6910107B1 (en) * | 2000-08-23 | 2005-06-21 | Sun Microsystems, Inc. | Method and apparatus for invalidation of data in computer systems |
JP2002077251A (ja) * | 2000-08-28 | 2002-03-15 | Nec Corp | データ伝送システム、データ中継装置、およびデータ中継方法 |
US6654858B1 (en) * | 2000-08-31 | 2003-11-25 | Hewlett-Packard Development Company, L.P. | Method for reducing directory writes and latency in a high performance, directory-based, coherency protocol |
US6633960B1 (en) * | 2000-08-31 | 2003-10-14 | Hewlett-Packard Development Company, L.P. | Scalable directory based cache coherence protocol |
US7406681B1 (en) | 2000-10-12 | 2008-07-29 | Sun Microsystems, Inc. | Automatic conversion of source code from 32-bit to 64-bit |
US7269663B2 (en) * | 2001-09-28 | 2007-09-11 | Intel Corporation | Tagging packets with a lookup key to facilitate usage of a unified packet forwarding cache |
US7107409B2 (en) * | 2002-03-22 | 2006-09-12 | Newisys, Inc. | Methods and apparatus for speculative probing at a request cluster |
US20030195939A1 (en) * | 2002-04-16 | 2003-10-16 | Edirisooriya Samatha J. | Conditional read and invalidate for use in coherent multiprocessor systems |
US7395379B2 (en) * | 2002-05-13 | 2008-07-01 | Newisys, Inc. | Methods and apparatus for responding to a request cluster |
US7653790B2 (en) * | 2002-05-13 | 2010-01-26 | Glasco David B | Methods and apparatus for responding to a request cluster |
US8185602B2 (en) | 2002-11-05 | 2012-05-22 | Newisys, Inc. | Transaction processing using multiple protocol engines in systems having multiple multi-processor clusters |
US20050144397A1 (en) * | 2003-12-29 | 2005-06-30 | Rudd Kevin W. | Method and apparatus for enabling volatile shared data across caches in a coherent memory multiprocessor system to reduce coherency traffic |
US7788452B2 (en) * | 2004-01-20 | 2010-08-31 | International Business Machines Corporation | Method and apparatus for tracking cached addresses for maintaining cache coherency in a computer system having multiple caches |
US7418582B1 (en) | 2004-05-13 | 2008-08-26 | Sun Microsystems, Inc. | Versatile register file design for a multi-threaded processor utilizing different modes and register windows |
US7941799B2 (en) | 2004-05-27 | 2011-05-10 | International Business Machines Corporation | Interpreting I/O operation requests from pageable guests without host intervention |
US20060009265A1 (en) * | 2004-06-30 | 2006-01-12 | Clapper Edward O | Communication blackout feature |
US7543132B1 (en) | 2004-06-30 | 2009-06-02 | Sun Microsystems, Inc. | Optimizing hardware TLB reload performance in a highly-threaded processor with multiple page sizes |
US7509484B1 (en) | 2004-06-30 | 2009-03-24 | Sun Microsystems, Inc. | Handling cache misses by selectively flushing the pipeline |
US7290116B1 (en) | 2004-06-30 | 2007-10-30 | Sun Microsystems, Inc. | Level 2 cache index hashing to avoid hot spots |
US7519796B1 (en) | 2004-06-30 | 2009-04-14 | Sun Microsystems, Inc. | Efficient utilization of a store buffer using counters |
US7366829B1 (en) | 2004-06-30 | 2008-04-29 | Sun Microsystems, Inc. | TLB tag parity checking without CAM read |
US7571284B1 (en) | 2004-06-30 | 2009-08-04 | Sun Microsystems, Inc. | Out-of-order memory transactions in a fine-grain multithreaded/multi-core processor |
US8756605B2 (en) * | 2004-12-17 | 2014-06-17 | Oracle America, Inc. | Method and apparatus for scheduling multiple threads for execution in a shared microprocessor pipeline |
US7430643B2 (en) * | 2004-12-30 | 2008-09-30 | Sun Microsystems, Inc. | Multiple contexts for efficient use of translation lookaside buffer |
US7716388B2 (en) * | 2005-05-13 | 2010-05-11 | Texas Instruments Incorporated | Command re-ordering in hub interface unit based on priority |
US7975109B2 (en) | 2007-05-30 | 2011-07-05 | Schooner Information Technology, Inc. | System including a fine-grained memory and a less-fine-grained memory |
US8037252B2 (en) * | 2007-08-28 | 2011-10-11 | International Business Machines Corporation | Method for reducing coherence enforcement by selective directory update on replacement of unmodified cache blocks in a directory-based coherent multiprocessor |
CN101452400B (zh) * | 2007-11-29 | 2011-12-28 | 国际商业机器公司 | 处理多处理器系统中事务缓冲器溢出的方法和系统 |
US8229945B2 (en) | 2008-03-20 | 2012-07-24 | Schooner Information Technology, Inc. | Scalable database management software on a cluster of nodes using a shared-distributed flash memory |
US8732386B2 (en) * | 2008-03-20 | 2014-05-20 | Sandisk Enterprise IP LLC. | Sharing data fabric for coherent-distributed caching of multi-node shared-distributed flash memory |
US8095502B2 (en) * | 2008-09-12 | 2012-01-10 | International Business Machines Corporation | Lightweight directory access protocol (LDAP) administrator task notification control |
US9164554B2 (en) | 2010-04-12 | 2015-10-20 | Sandisk Enterprise Ip Llc | Non-volatile solid-state storage system supporting high bandwidth and random access |
US8725951B2 (en) | 2010-04-12 | 2014-05-13 | Sandisk Enterprise Ip Llc | Efficient flash memory-based object store |
US8868487B2 (en) | 2010-04-12 | 2014-10-21 | Sandisk Enterprise Ip Llc | Event processing in a flash memory-based object store |
US9047351B2 (en) | 2010-04-12 | 2015-06-02 | Sandisk Enterprise Ip Llc | Cluster of processing nodes with distributed global flash memory using commodity server technology |
US8856593B2 (en) | 2010-04-12 | 2014-10-07 | Sandisk Enterprise Ip Llc | Failure recovery using consensus replication in a distributed flash memory system |
US8954385B2 (en) | 2010-06-28 | 2015-02-10 | Sandisk Enterprise Ip Llc | Efficient recovery of transactional data stores |
US8694733B2 (en) | 2011-01-03 | 2014-04-08 | Sandisk Enterprise Ip Llc | Slave consistency in a synchronous replication environment |
US8874515B2 (en) | 2011-04-11 | 2014-10-28 | Sandisk Enterprise Ip Llc | Low level object version tracking using non-volatile memory write generations |
US8914650B2 (en) * | 2011-09-28 | 2014-12-16 | Intel Corporation | Dynamically adjusting power of non-core processor circuitry including buffer circuitry |
US9135064B2 (en) | 2012-03-07 | 2015-09-15 | Sandisk Enterprise Ip Llc | Fine grained adaptive throttling of background processes |
FR2989489B1 (fr) * | 2012-04-16 | 2015-11-27 | Commissariat Energie Atomique | Systeme et procede de gestion d'une coherence de caches dans un reseau de processeurs munis de memoires caches. |
US20140040561A1 (en) * | 2012-07-31 | 2014-02-06 | Futurewei Technologies, Inc. | Handling cache write-back and cache eviction for cache coherence |
US11768769B2 (en) * | 2016-04-25 | 2023-09-26 | Netlist, Inc. | Uniform memory access in a system having a plurality of nodes |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4794521A (en) * | 1985-07-22 | 1988-12-27 | Alliant Computer Systems Corporation | Digital computer with cache capable of concurrently handling multiple accesses from parallel processors |
CA2045756C (en) * | 1990-06-29 | 1996-08-20 | Gregg Bouchard | Combined queue for invalidates and return data in multiprocessor system |
US5274782A (en) * | 1990-08-27 | 1993-12-28 | International Business Machines Corporation | Method and apparatus for dynamic detection and routing of non-uniform traffic in parallel buffered multistage interconnection networks |
US5394555A (en) * | 1992-12-23 | 1995-02-28 | Bull Hn Information Systems Inc. | Multi-node cluster computer system incorporating an external coherency unit at each node to insure integrity of information stored in a shared, distributed memory |
US5617537A (en) * | 1993-10-05 | 1997-04-01 | Nippon Telegraph And Telephone Corporation | Message passing system for distributed shared memory multiprocessor system and message passing method using the same |
US5675796A (en) * | 1994-04-08 | 1997-10-07 | Microsoft Corporation | Concurrency management component for use by a computer program during the transfer of a message |
US5680482A (en) * | 1995-05-17 | 1997-10-21 | Advanced Micro Devices, Inc. | Method and apparatus for improved video decompression by adaptive selection of video input buffer parameters |
EP0752666A3 (de) * | 1995-07-06 | 2004-04-28 | Sun Microsystems, Inc. | Verfahren und Vorrichtung zur Beschleunigung von Sklave-Anforderungen in einem paketvermittelten Computersystem |
US5852718A (en) * | 1995-07-06 | 1998-12-22 | Sun Microsystems, Inc. | Method and apparatus for hybrid packet-switched and circuit-switched flow control in a computer system |
US5613071A (en) * | 1995-07-14 | 1997-03-18 | Intel Corporation | Method and apparatus for providing remote memory access in a distributed memory multiprocessor system |
US5740353A (en) * | 1995-12-14 | 1998-04-14 | International Business Machines Corporation | Method and apparatus for creating a multiprocessor verification environment |
US5710907A (en) * | 1995-12-22 | 1998-01-20 | Sun Microsystems, Inc. | Hybrid NUMA COMA caching system and methods for selecting between the caching modes |
-
1996
- 1996-07-01 US US08/674,358 patent/US6141692A/en not_active Expired - Lifetime
-
1997
- 1997-06-23 DE DE69721640T patent/DE69721640T2/de not_active Expired - Fee Related
- 1997-06-23 EP EP97304385A patent/EP0817062B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0817062A2 (de) | 1998-01-07 |
US6141692A (en) | 2000-10-31 |
EP0817062B1 (de) | 2003-05-07 |
EP0817062A3 (de) | 1998-05-13 |
DE69721640T2 (de) | 2004-03-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |