DE69808132T2 - Verfahren und system zu verarbeitung von befehlen in nach dem fliessbandprinzip arbeitenden speicheranlagen - Google Patents

Verfahren und system zu verarbeitung von befehlen in nach dem fliessbandprinzip arbeitenden speicheranlagen

Info

Publication number
DE69808132T2
DE69808132T2 DE69808132T DE69808132T DE69808132T2 DE 69808132 T2 DE69808132 T2 DE 69808132T2 DE 69808132 T DE69808132 T DE 69808132T DE 69808132 T DE69808132 T DE 69808132T DE 69808132 T2 DE69808132 T2 DE 69808132T2
Authority
DE
Germany
Prior art keywords
command
counter
signal
start command
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69808132T
Other languages
English (en)
Other versions
DE69808132D1 (de
Inventor
A Manning
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of DE69808132D1 publication Critical patent/DE69808132D1/de
Publication of DE69808132T2 publication Critical patent/DE69808132T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1039—Read-write modes for single port memories, i.e. having either a random port or a serial port using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
DE69808132T 1997-12-19 1998-12-18 Verfahren und system zu verarbeitung von befehlen in nach dem fliessbandprinzip arbeitenden speicheranlagen Expired - Lifetime DE69808132T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/994,461 US6202119B1 (en) 1997-12-19 1997-12-19 Method and system for processing pipelined memory commands
PCT/US1998/026982 WO1999033058A1 (en) 1997-12-19 1998-12-18 Method and system for processing pipelined memory commands

Publications (2)

Publication Number Publication Date
DE69808132D1 DE69808132D1 (de) 2002-10-24
DE69808132T2 true DE69808132T2 (de) 2003-05-15

Family

ID=25540686

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69808132T Expired - Lifetime DE69808132T2 (de) 1997-12-19 1998-12-18 Verfahren und system zu verarbeitung von befehlen in nach dem fliessbandprinzip arbeitenden speicheranlagen

Country Status (8)

Country Link
US (2) US6202119B1 (de)
EP (1) EP1040484B1 (de)
JP (1) JP2001527262A (de)
KR (1) KR100514712B1 (de)
AT (1) ATE224576T1 (de)
AU (1) AU2003499A (de)
DE (1) DE69808132T2 (de)
WO (1) WO1999033058A1 (de)

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US10210918B2 (en) 2017-02-28 2019-02-19 Micron Technology, Inc. Apparatuses and methods for determining a phase relationship between an input clock signal and a multiphase clock signal
US10269397B2 (en) 2017-08-31 2019-04-23 Micron Technology, Inc. Apparatuses and methods for providing active and inactive clock signals
US10607671B2 (en) * 2018-02-17 2020-03-31 Micron Technology, Inc. Timing circuit for command path in a memory device
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Also Published As

Publication number Publication date
US6360292B1 (en) 2002-03-19
KR20010033364A (ko) 2001-04-25
EP1040484B1 (de) 2002-09-18
KR100514712B1 (ko) 2005-09-14
WO1999033058A1 (en) 1999-07-01
JP2001527262A (ja) 2001-12-25
US6202119B1 (en) 2001-03-13
ATE224576T1 (de) 2002-10-15
AU2003499A (en) 1999-07-12
DE69808132D1 (de) 2002-10-24
EP1040484A1 (de) 2000-10-04

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